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HMS81C2012A/2020A
SEP. 2004 Ver 2.00
89
Figure 21-4 Timing Diagram in READ Mode
Parameter
Symbol
MIN
TYP
MAX
Unit
Programming Supply Current
IVPP
--
50
mA
Supply Current in EPROM Mode
IVDDP
--
20
mA
VPP Level during Programming
VIHP
11.5
12.0
12.5
V
VDD Level in Program Mode
VDD1H
56
6.5
V
VDD Level in Read Mode
VDD2H
-2.7
-
V
CTL3~0 High Level in EPROM Mode
VIHC
0.8VDD
--
V
CTL3~0 Low Level in EPROM Mode
VILC
--
0.2VDD
V
A_D7~A_D0 High Level in EPROM Mode
VIHAD
0.9VDD
--
V
A_D7~A_D0 Low Level in EPROM Mode
VILAD
--
0.1VDD
V
VDD Saturation Time
TVDDS
1-
-
mS
VPP Setup Time
TVPPR
--
1
mS
VPP Saturation Time
TVPPS
1-
-
mS
EPROM Enable Setup Time after Data Input
TSET1
200
nS
EPROM Enable Hold Time after TSET1
THLD1
500
nS
Table 21-2 AC/DC Requirements for Program/Read Mode
VPP
CTL0/1
High 8bit
HA
LA
DATA
LA
DATA
DATA
EPROM
Enable
CTL2
CTL3
A_D7~
VDD
VDD2H
0V
0V
0V
Address
Input
Low 8bit
Address
Input
DATA
A_D0
TVDDS
TVPPR
TVPPS
VDD2H
VDD2H
VIHP
THLD1
THLD2
TSET1
TDLY1
TDLY2
TCD1
TCD2
TCD2
TCD1
HA
LA
Output
Low 8bit
Address
Input
High 8bit
Address
Input
Low 8bit
Address
Input
DATA
Output
DATA
Output
After input a high address,
output data following low address input
Anothe high address step
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