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M39P0R9070E0 Datasheet(PDF) 6 Page - STMicroelectronics

Part No. M39P0R9070E0
Description  512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory 128 Mbit Low Power SDRAM, 1.8V Supply, Multi-Chip Package
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M39P0R9070E0 Datasheet(HTML) 6 Page - STMicroelectronics

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1 Summary description
M39P0R9070E0
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1
Summary description
The M39P0R9070E0 combines two memory devices in one Multi-Chip Package:
512-Mbit Multiple Bank Flash memory (the M58PR512J)
128-Mbit Low Power Synchronous DRAM (the M65KA128AL)
This datasheet should be read in conjunction with the M58PR512J and
M65KA128AL
datasheets, available from www.st.com.
Recommended operating conditions do not allow more than one memory to be active at the
same time.
The memory is offered in a Stacked TFBGA105 package. It is supplied with all the bits erased
(set to ‘1’).
Figure 1.
Logic Diagram
Ai11735b
A0-A24
EF
DQ0-DQ15
VDDQ
M39P0R9070E0
GF
VSS
16
WF
RPF
WPF
VDDF
DPDF
ES
WS
VPPF
VDDS
LF
KF
WAITF
25
CASS
RASS
BA0-BA1
2
KS
KES
UDQMS
LDQMS


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