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IN74LV273 Datasheet(PDF) 4 Page - Integral Corp.

Part No. IN74LV273
Description  Octal D Flip-Flop with Common Clock and Reset
Download  7 Pages
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Maker  INTEGRAL [Integral Corp.]
Homepage  http://www.iksemi.com/
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IN74LV273 Datasheet(HTML) 4 Page - Integral Corp.

   
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IN74LV273
4
INTEGRAL
AC ELECTRICAL CHARACTERISTICS (C
L=50 pF, t r=tf=2.5 ns)
Test
VCC
Guaranteed Limit
Symbol
Parameter
conditions
V
-40
°C to
25
°C
85
°C
125
°C
Unit
min
max
min
max
min
max
tPHL, tPLH Propagation delay , Clock
to Q
VI = 0 V or V1
Figures 1,4
1.2
2.0
2.7
3.0
4.5
-
-
-
-
-
150
30
22
17
14
-
-
-
-
-
150
32
24
19
16
-
-
-
-
-
150
41
30
24
20
ns
tPHL
Propagation delay , Reset
to Q
VI = 0 V or V1
Figures 2,4
1.2
2.0
2.7
3.0
4.5
-
-
-
-
-
160
40
30
23
19
-
-
-
-
-
160
44
33
26
22
-
-
-
-
-
160
56
41
33
28
ns
CI
Input capacitance
5.0
-
6.0*
-
-
-
-
pF
CPD
Power dissipation
capacitance (per flip-flop)
VI = 0 V or VCC
5.5
-
40*
-
-
-
-
pF
* T = 25
oC
TIMING REQUIREMENTS(C
L=50 pF, t r=tf=2.5 ns )
Test
VCC
Guaranteed Limit
Symbol
Parameter
conditions
V
-40
°C to
25
°C
85
°C
125
°C
Unit
min
max
min
max
min
max
tw
Pulse Width, Clock (low or
high), Reset (low)
VI = 0 V or V1
Figures 1,2,4
1.2
2.0
2.7
3.0
4.5
60
28
21
16
12
-
-
-
-
-
70
34
25
20
16
-
-
-
-
-
80
41
30
24
20
-
-
-
-
-
ns
tsu
Setup Time, Data to Clock
VI = 0 V or V1
Figures 3,4
1.2
2.0
2.7
3.0
4.5
40
18
13
11
9
-
-
-
-
-
50
22
16
13
11
-
-
-
-
-
60
26
19
15
13
-
-
-
-
-
ns
trem
Removal Time, Reset to
Clock
VI = 0 V or V1
Figures 2,4
1.2
2.0
2.7
3.0
4.5
5
5
5
5
5
-
-
-
-
-
5
5
5
5
5
-
-
-
-
-
5
5
5
5
5
-
-
-
-
-
ns
th
Hold Time, Clock to Data
VI = 0 V or V1
Figures 3,4
1.2
2.0
2.7
3.0
4.5
50
5
5
5
5
-
-
-
-
-
50
5
5
5
5
-
-
-
-
-
50
5
5
5
5
-
-
-
-
-
ns


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