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XRT75L03 Datasheet(PDF) 4 Page - Exar Corporation

Part No. XRT75L03
Description  THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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Maker  EXAR [Exar Corporation]
Homepage  http://www.exar.com
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XRT75L03 Datasheet(HTML) 4 Page - Exar Corporation

 
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XRT75L03
REV. 1.0.4
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
I
TABLE OF CONTENTS
GENERAL DESCRIPTION ............................................................................................... 1
FEATURES .................................................................................................................................................... 1
APPLICATIONS .............................................................................................................................................. 1
TRANSMIT INTERFACE CHARACTERISTICS ...................................................................................................... 2
RECEIVE INTERFACE CHARACTERISTICS ........................................................................................................ 2
Figure 1. Block Diagram of the XRT 75L03 ...................................................................................................... 2
Figure 2. Pin Out of the XRT75L03 ................................................................................................................... 3
ORDERING INFORMATION ................................................................................................................... 3
TABLE OF CONTENTS .................................................................................................................................... I
PIN DESCRIPTIONS (BY FUNCTION) ............................................................................. 4
SYSTEM-SIDE TRANSMIT INPUT AND TRANSMIT CONTROL PINS ...................................................................... 4
TRANSMIT LINE SIDE PINS ............................................................................................................................ 8
SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS .................................................................... 10
RECEIVE LINE SIDE PINS ............................................................................................................................ 17
CLOCK INTERFACE ...................................................................................................................................... 18
GENERAL CONTROL PINS ........................................................................................................................... 19
CONTROL AND ALARM INTERFACE ............................................................................................................... 21
JITTER ATTENUATOR INTERFACE ................................................................................................................. 21
POWER SUPPLY AND GROUND PINS ............................................................................................................ 24
XRT75L03 PIN LISTING IN NUMERICAL ORDER ........................................................................................... 26
1.0 ELECTRICAL CHARACTERISTICS ................................................................................................. 31
TABLE 1: ABSOLUTE MAXIMUM RATINGS ............................................................................................................ 31
TABLE 2: DC ELECTRICAL CHARACTERISTICS: ................................................................................................... 31
2.0 TIMING CHARACTERISTICS ............................................................................................................ 32
Figure 3. Typical interface between terminal equipment and the XRT75L03 (dual-rail data) ......................... 32
Figure 4. Transmitter Terminal Input Timing ................................................................................................... 32
Figure 5. Receiver Data output and code violation timing .............................................................................. 33
Figure 6. Transmit Pulse Amplitude test circuit for E3, DS3 and STS-1 Rates ............................................... 33
3.0 LINE SIDE CHARACTERISTICS: ..................................................................................................... 34
3.1 E3 LINE SIDE PARAMETERS: ............................................................................................................................. 34
Figure 7. Pulse Mask for E3 (34.368 mbits/s) interface as per itu-t G.703 ..................................................... 34
TABLE 3: E3 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS ........................... 35
Figure 8. Bellcore GR-253 CORE Transmit Output Pulse Template for SONET STS-1 Applications ............ 36
TABLE 4: STS-1 PULSE MASK EQUATIONS ........................................................................................................ 36
TABLE 5: STS-1 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS (GR-253) . 37
Figure 9. Transmit Ouput Pulse Template for DS3 as per Bellcore GR-499 .................................................. 37
TABLE 6: DS3 PULSE MASK EQUATIONS ........................................................................................................... 38
TABLE 7: DS3 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS (GR-499) ..... 38
Figure 10. Microprocessor Serial Interface Structure ...................................................................................... 39
Figure 11. Timing Diagram for the Microprocessor Serial Interface ................................................................ 39
TABLE 8: MICROPROCESSOR SERIAL INTERFACE TIMINGS ( TA = 250C, VDD=3.3V± 5% AND LOAD = 10PF) ..... 39
FUNCTIONAL DESCRIPTION: ........................................................................................ 41
4.0 The Transmitter Section: ................................................................................................................. 41
Figure 12. Single-Rail or NRZ Data Format (Encoder and Decoder are Enabled) ......................................... 41
Figure 13. Dual-Rail Data Format (encoder and decoder are disabled) ......................................................... 41
4.1 TRANSMIT CLOCK: ........................................................................................................................................... 42
4.2 B3ZS/HDB3 ENCODER: .................................................................................................................................. 42
4.2.1 B3ZS Encoding: ................................................................................................................................. 42
4.2.2 HDB3 Encoding: ................................................................................................................................. 42
Figure 14. B3ZS Encoding Format ................................................................................................................. 42
Figure 15. HDB3 Encoding Format ................................................................................................................. 42
4.3 TRANSMIT PULSE SHAPER: .............................................................................................................................. 43
4.3.1 Guidelines for using Transmit Build Out Circuit: ............................................................................ 43


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