IC62LV256-100U datasheet(8/9 Pages) ICSI

Part #	IC62LV256-100U

Description	32K x 8 Low Power SRAM with 3.3V

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Manufacturer	ICSI [Integrated Circuit Solution Inc]

Direct Link	http://www.icsi.com.tw

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8 / 9 page

IC62LV256

8

Integrated Circuit Solution Inc.

ALSR007-0A 10/5/2001

WRITE CYCLE NO. 2 (

CE

CE Controlled)(1,2)

HIGH-Z

DATA UNDEFINED

DATA-IN VALID

tWC

tSCE

tSA

tHA

tPWE

tAW

tHZWE

tSD

tHD

tLZWE

ADDRESS

DIN

CE

WE

DOUT

Notes:

1. The internal write time is defined by the overlap of

CE LOW and WE LOW. All signals must be in valid states to initiate a Write,

but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling

edge of the signal that terminates the Write.

2. I/O will assume the High-Z state if

OE ≥ VIH.

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