IC62LV256

Integrated Circuit Solution Inc.

5

ALSR007-0A 10/5/2001

-45 ns

-70 ns

-100 ns

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Read Cycle Time

45

—

70

—

100

—

ns

Address Access Time

—

45

—

70

—

100

ns

Output Hold Time

2

—

2

—

2

—

ns

CE Access Time

—

45

—

70

—

100

ns

OE Access Time

—

25

—

35

—

50

ns

OE to Low-Z Output

0

—

0

—

0

—

ns

OE to High-Z Output

0

20

0

25

0

25

ns

CE to Low-Z Output

3

—

3

—

3

—

ns

CE to High-Z Output

0

20

0

25

0

25

ns

CE to Power-Up

0

—

0

—

0

—

ns

CE to Power-Down

—

30

—

50

—

50

ns

Notes:

1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V

and output loading specified in Figure 1a.

2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.

AC TEST LOADS

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

0V to 3.0V

Input Rise and Fall Times

5 ns

Input and Output Timing

1.5V

and Reference Levels

Output Load

See Figures 1a and 1b

1213

Ω

100 pF

Including

jig and

scope

1378

Ω

OUTPUT

3.3V

Figure 1a.

Figure 1b.

1213

Ω

5 pF

Including

jig and

scope

1378

Ω

OUTPUT

3.3V