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I1819F-08SR Datasheet(PDF) 4 Page - Alliance Semiconductor Corporation |
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I1819F-08SR Datasheet(HTML) 4 Page - Alliance Semiconductor Corporation |
4 / 8 page ® Low Power Mobile VGA EMI Reduction IC 4 of 8 March 2003 P1818/19/20/21/22 Notice: The information in this document is subject to change without notice. Frequency vs. Deviation (P1818A and P1818H) Pin Description Frequency Deviation in P1818A Deviation in P1818H SRS = 1 SRS = 0 D_C = 1 D_C = 0 10 MHz -4.4% -3.3% -4.4% ±2.2% 15 MHz -1.8% -1.26% -1.8% ±0.9% 20 MHz -0.8% -0.6% -0.8% ±0.4% Pin number Name Type Description 1 XIN I Connect to externally generated clock signal or crystal. 2 VSS P Ground Connection. Connect to system ground. 3 SRS I Spread Range Select. Digital logic input used to select frequency devi- ation (see Spread Deviation Selections). This pin has an internal pull- up resistor. 31 1. Please refer to Figure 1 for pin assignment. D_C I Digital logic input used to select Down (LOW) or Center (HIGH) Spread Options (see Spread Deviation Selections). This pin has an internal pull-up resistor. 4 ModOut O Spread Spectrum clock output (see Input Frequency and Modulation Rate Selections and Spread Deviation Selections). 5 REF O Non-modulated reference output clock of the input frequency. 5/61 FRS I Frequency Range Select. Digital logic input used to select input fre- quency range (see Input Frequency and Modulation Rate Selections). This pin has an internal pull-up resistor. 61 PD# I Power-Down control pin. Pull LOW to enable Power-Down mode. This pin has an internal pull-up resistor. 7 VDD P Connect to +3.3V 8 XOUT I Connect to crystal. No connect if externally generated clock signal is used. 81 MRS I Modulation Rate Select. Digital logic input used to select Modulation Rate (see Spread Deviation Selections). This pin has an internal pull- up resistor. |
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