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S3C9688 Datasheet(PDF) 77 Page - Samsung semiconductor |
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S3C9688 Datasheet(HTML) 77 Page - Samsung semiconductor |
77 / 209 page S3C9688/P9688 CONTROL REGISTERS 4 -47 USBPND — USB Interrupt Pending Register F6H Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0 RESET Value – – 0 0 0 0 0 0 Read/Write – – R/W R/W R/W R/W R/W R/W .7 –.6 Not used for C9688/P9688 .5 USB Reset Interrupt Pending Bit 0 No effect (Write 1, this bit is cleared ) 1 This bit is set, when USB bus reset is detected on the bus. .4 ENDPOINT 2 Interrupt Pending Bit 0 No effect (Write 1, this bit is cleared) 1 This bit is set, when endpoint2 needs to be serviced .3 RESUME Interrupt Pending Bit 0 No effect (Write 1, this bit is cleared) 1 While in suspend mode, if resume signaling is received this bit gets set .2 SUSPEND Interrupt Pending Bit 0 No effect (Write 1, this bit is cleared ) 1 This bit is set, when suspend signaling is received .1 ENDPOINT1 Interrupt Pending Bit 0 No effect (Write 1, this bit is cleared) 1 This bit is set, when endpoint1 needs to be serviced .0 ENDPOINT0 Interrupt Pending Bit 0 No effect (Write1, this bit is cleared ) 1 This bit is set, while endpoint 0 needs to serviced. It is set under the following conditions; — OUT_PKT_RDY is set — IN_PKT_RDY get cleared — SENT_STALL gets set — SETUP_DATA_END gets cleared — SETUP_TRANSFER_END gets set |
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