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PMS234-K24 Datasheet(PDF) 49 Page - PADAUK Technology. |
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PMS234-K24 Datasheet(HTML) 49 Page - PADAUK Technology. |
49 / 107 page PMC234/PMS234 Series 12-bit ADC Enhanced FPPA TM 8-bit Controller ©Copyright 2018, PADAUK Technology Co. Ltd Page 49 of 107 PDK-DS-PMX234_V103 – Dec. 19, 2018 The sample program for using the Timer2 to generate PWM waveform from PA2 is shown as below: void FPPA0 (void) { . .ADJUST_IC SYSCLK=IHRC/2, IHRC=16MHz, VDD=5V wdreset; tm2ct = 0x00; tm2b = 0x7f; tm2s = 0b0_00_00001; // 8-bit PWM, pre-scalar = 1, scalar = 2 tm2c = 0b0001_01_1_0; // system clock, output=PA2, PWM mode while(1) { nop; } } 5-9-3. Using the Timer2 to generate 6-bit PWM waveform If 6-bit PWM mode is selected, it should set tm2c[1]=1 and tm2s[7]=1, the frequency and duty cycle of output waveform can be summarized as below: Frequency of Output = Y ÷ [64 × S1 × (S2+1) ] Duty of Output = [( K+1 ) ÷ 64] × 100% Where, tm2c[7:4] = Y : frequency of selected clock source tm2b[7:0] = K : bound register in decimal tm2s[6:5] = S1 : pre-scalar (1, 4, 16, 64) tm2s[4:0] = S2 : scalar register in decimal (1 ~ 31) Example 1: tm2c = 0b0001_1110, Y=8MHz tm2b = 0b0001_1111, K=31 tm2s = 0b1_00_00000, S1=1, S2=0 frequency of output = 8MHz ÷ ( 64 × 1 × (0+1) ) = 125KHz duty = [(31+1) ÷ 64] × 100% = 50% Example 2: tm2c = 0b0001_1110, Y=8MHz tm2b = 0b0001_1111, K=31 tm2s = 0b1_11_11111, S1=64, S2=31 frequency of output = 8MHz ÷ ( 64 × 64 × (31+1) ) = 61.03 Hz duty of output = [(31+1) ÷ 64] × 100% = 50% |
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