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PMS234-D20 Datasheet(PDF) 51 Page - PADAUK Technology.

Part # PMS234-D20
Description  12-bit ADC Enhanced
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Manufacturer  PADAUK [PADAUK Technology.]
Direct Link  http://www.padauk.com.tw/
Logo PADAUK - PADAUK Technology.

PMS234-D20 Datasheet(HTML) 51 Page - PADAUK Technology.

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PMC234/PMS234 Series
12-bit ADC Enhanced FPPA
TM
8-bit Controller
©Copyright 2018, PADAUK Technology Co. Ltd
Page 51 of 107
PDK-DS-PMX234_V103 – Dec. 19, 2018
5-11. Interrupt
There are six interrupt lines for PMC234/PMS234:
External interrupt PA0
External interrupt PB0
ADC interrupt
Timer16 interrupt
Timer2 interrupt
Comparator interrupt,
Every interrupt request line has its own corresponding interrupt control bit to enable or disable it; the
hardware diagram of interrupt function is shown as Fig. 14. All the interrupt request flags are set by
hardware and cleared by writing intrq register. When the request flags are set, it can be rising edge, falling
edge or both, depending on the setting of register integs. All the interrupt request lines are also controlled
by engint instruction (enable global interrupt) to enable interrupt operation and disgint instruction (disable
global interrupt) to disable it. Only FPP0 can accept the interrupt request, other FPP unit will not be
interfered by interrupt.
The stack memory for interrupt is shared with data memory and its address is specified by stack register sp.
Since the program counter is 16 bits width, the bit 0 of stack register sp should be kept 0. Moreover, user
can use pushaf / popaf instructions to store or restore the values of ACC and flag register to / from stack
memory. Since the stack memory is shared with data memory, user should manipulate the memory using
carefully. By adjusting the memory location of stack point, the depth of stack pointer for every FPP unit
could be fully specified by user to achieve maximum flexibility of system.
Fig. 14: Hardware diagram of interrupt controller
Once the interrupt occurs, its operation will be:
 The program counter will be stored automatically to the stack memory specified by register sp.
 New sp will be updated to sp+2.
 Global interrupt will be disabled automatically.
 The next instruction will be fetched from address 0x10.
During the interrupt service routine, the interrupt source can be determined by reading the intrq register.
Note: Even if INTEN=0, INTRQ will be still triggered by the interrupt source.
Inten.6
Inten.4
Inten.3
Inten.2
Inten.1
Inten.0
engint / disgint
Note: “engint” and
“disgint” are instructions
interrupt
to FPP0
detect
both
edges
detect
both
edges
detect
rising
edge
detect
event
detect
rising
edge
detect
event
Intrq.0
Intrq.1
Intrq.2
Intrq.3
Intrq.4
Intrq.6
PA0
PB0
T16 output
ADC output
Comparator
output
Timer2
output
Inten.6
Inten.4
Inten.3
Inten.2
Inten.1
Inten.0
engint / disgint
Note: “engint” and
“disgint” are instructions
interrupt
to FPP0
detect
both
edges
detect
both
edges
detect
rising
edge
detect
event
detect
rising
edge
detect
event
Intrq.0
Intrq.1
Intrq.2
Intrq.3
Intrq.4
Intrq.6
PA0
PB0
T16 output
ADC output
Comparator
output
Timer2
output


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