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PMS232 Datasheet(PDF) 58 Page - PADAUK Technology. |
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PMS232 Datasheet(HTML) 58 Page - PADAUK Technology. |
58 / 94 page PMC232/PMS232 Series 12-bit ADC Enhanced FPPA TM 8-bit OTP Controller ©Copyright 2018, PADAUK Technology Co. Ltd Page 58 of 94 PDK-DS-PMx232_V104– Dec. 18, 2018 Before starting the AD conversion, the minimum signal acquisition time should be met for the selected analog input signal. The signal acquisition time (TACQ) of ADC in PMC232/PMS232 series is fixed to one clock period of ADCLK, the selection of ADCLK must be met the minimum signal acquisition time. 5-16-2. Select the ADC bit resolution The ADC resolution is 12bit. Please configure adcm register bit [7:5] to be “100” before staring AD conversion via $ADCM instruction. Higher resolution can detect small signal variation; however, it will take more time to convert the analog signal to digital signal. The selection can be done via adcm register. The ADC bit resolution should be configured before starting the AD conversion. 5-16-3. ADC clock selection The clock of ADC module (ADCLK) can be selected by adcm register; there are 8 possible options for ADCLK from sysclk/1 to sysclk/128. Due to the signal acquisition time TACQ is one clock period of ADCLK, the ADCLK must meet that requirement. The recommended ADC clock is to operate at 2us. 5-16-4. AD conversion The process of AD conversion starts from setting START/DONE bit (bit 6 of adcc) to high, the START/DONE flag for read will be cleared automatically, then converting analog signal bit by bit and finally setting START/DONE high to indicate the completion of AD conversion. If ADCLK is selected, TADCLK is the period of ADCLK and the AD conversion time can be calculated as follows: 12-bit resolution: AD conversion time = 17 TADCLK 5-16-5. Configure the analog pins The 10 analog input signals for ADC shared with Port A[3], Port A[4], and Port B[6:0]. To avoid leakage current at the digital circuit, those pins defined for analog input should disable the digital input function (set the corresponding bit of padier or pbdier register to be 0). The measurement signals of ADC belong to small signal; it should avoid the measured signal to be interfered during the measurement period, the selected pin should (1) be set to input mode (2) turn off weak pull-up resistor (3) set the corresponding pin to analog input by port A/B digital input disable register (padier / pbdier). |
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