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ASM5I9775AG-52-ET Datasheet(PDF) 6 Page - Alliance Semiconductor Corporation |
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ASM5I9775AG-52-ET Datasheet(HTML) 6 Page - Alliance Semiconductor Corporation |
6 / 12 page June 2005 ASM5I9775A rev 0.3 2.5V or 3.3V, 200-MHz, 14 Output Zero Delay Buffer 6 of 12 Notice: The information in this document is subject to change without notice. DC Electrical Specifications (VDD= 3.3V ± 5%, T A = –40°C to +85°C) Parameter Description Condition Min Typ Max Unit VIL Input Voltage, Low LVCMOS - - 0.8 V VIH Input Voltage, High LVCMOS 2.0 - VDD+0.3 V IOL= 24 mA - - 0.55 VOL Output Voltage, Low 4 IOL= 12 mA - - 0.30 V VOH Output Voltage, High 4 IOH= –24 mA 2.4 - - V IIL Input Current, Low 5 VIL= VSS - - -100 µA IIH Input Current, High 5 VIL= VDD - - 100 µA IDDA PLL Supply Current AVDD only - 5 10 mA IDDQ Quiescent Supply Current All VDD pins except AVDD - - 1 mA Outputs loaded @ 100 MHz - 225 - IDD Dynamic Supply Current Outputs loaded @ 200 MHz - 290 - mA CIN Input Pin Capacitance - 4 - pF ZOUT Output Impedance 12 15 18 Ω DC Electrical Specifications (VDD= 2.5V ± 5%, T A = –40°C to +85°C) Parameter Description Condition Min. Typ. Max Unit VIL Input Voltage, Low LVCMOS - - 0.7 V VIH Input Voltage, High LVCMOS 1.7 - VDD+0.3 V VOL Output Voltage, Low 4 IOL= 15 mA - - 0.6 V VOH Output Voltage, High 4 IOH= –15 mA 1.8 - - V IIL Input Current, Low 5 VIL= VSS - - -100 µA IIH Input Current, High 5 VIL= VDD - - 100 µA IDDA PLL Supply Current AVDD only - 5 10 mA IDDQ Quiescent Supply Current All VDD pins except AVDD - - 1 mA Outputs loaded @ 100 MHz - 135 - IDD Dynamic Supply Current Outputs loaded @ 200 MHz - 160 - mA CIN Input Pin Capacitance - 4 - pF ZOUT Output Impedance 14 18 22 Ω Notes: 4. Driving one 50Ω parallel terminated transmission line to a termination voltage of VTT. Alternatively, each output drives up to two 50Ω series terminated transmission lines. 5. Inputs have pull-up or pull-down resistors that affect the input current. |
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