ASM5I9658-32-LR datasheet(2/14 Pages) ALSC

Part #	ASM5I9658-32-LR

Description	3.3V 1:10 LVCMOS PLL Clock Generator

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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2 / 14 page

July 2005

ASM5I9658

rev 0.2

3.3V 1:10 LVCMOS PLL Clock Generator

2 of 14

Notice: The information in this document is subject to change without notice.

Block Diagram

Figure 1. ASM5I9658 Logic Diagram

Pin Configuration

Figure 2. ASM5I9658 32-Lead Package Pinout (Top View)

25

26

27

28

29

30

31

32

24 23 22 21 20 19 18 17

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Q1

VCC

Q0

GND

QFB

VCC

VCO_SEL

GND

VCC

Q8

GND

Q7

VCC

Q6

Q9

GND

ASM5I9658

Q8

0

1

Q0

Q1

Q2

Q3

Q5

Q6

Q7

QFB

200-500 MHz

Ref

FB

PLL

PCLK

FB_IN

PLL_EN

BYPASS

PCLK

2-25k

VCC

Q4

÷2

0

1

÷1

÷2

0

1

VCO

&

VCC

25k

VCC

3-25k

VCO_SEL

MR/OE

Q9

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