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ASM3P2190A-08TT Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation

Part # ASM3P2190A-08TT
Description  Peak Reducing EMI Solution
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

ASM3P2190A-08TT Datasheet(HTML) 1 Page - Alliance Semiconductor Corporation

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Alliance Semiconductor
2595, Augustine Drive
• Santa Clara • CA 95054 • Tel 408 855 4900 • Fax 408 855 4999 • www.alsc.com
November 2003
ASM3P2190A
rev 1.0
Notice: The information in this document is subject to change without notice.
Peak Reducing EMI Solution
Features
Generates an EMI optimized clocking
signal at the output.
Selectable output frequency range.
Single 1.25% or 2.4% down spread
output.
Integrated loop filter components.
Operates with a 3.3V supply.
Low-power CMOS design.
Available in 8-pin SOIC and 8-pin
TSSOP packages.
Product Description
The ASM3P2190A is a versatile spread spectrum
frequency modulator designed specifically for a
wide
range
of
clock
frequencies.
The
ASM3P2190A
reduces
electromagnetic
interference (EMI) at the clock source, allowing
system wide reduction of EMI of down stream
clock
and
data
dependent
signals.
The
ASM3P2190A allows significant system cost
savings by reducing the number of circuit board
layers and shielding that are traditionally required
to pass EMI regulations.
The ASM3P2190A modulates the output of a
single PLL in order to “spread” the bandwidth of a
synthesized clock, thereby decreasing the peak
amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
typical
narrow
band
signal
produced
by
oscillators and most clock generators. Lowering
EMI by increasing a signal’s bandwidth is called
spread spectrum clock generation.
The ASM3P2190A uses the most efficient and
optimized modulation profile approved by the
FCC and is implemented by using a proprietary
all-digital method.
Applications
The ASM3P2190A is targeted towards notebook
LCD displays, other displays using an LVDS
interface, PC peripheral devices and embedded
systems.
Key Specifications
Description
Specification
Supply voltages
VDD = 3.3V ± 5%
Frequency range
6 MHz
≤ 30 MHz
Cycle-to-cycle jitter
325 ps (typical)
Selectable spread percentage
-1.25% or –2.4%
Output duty cycle
40/60% (worst case)
Output rise and fall time
5ns (maximum)
Simplified Block Diagram
Pin Diagram
X1
X2
3.3V
Spread spectrum output
(EMI suppressed)
CLKOUT
NC
VDD
FS1
1
2
3
4
5
6
7
8
CLKIN / X1
NC / X2
GND
SS%
ASM3P2190A


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