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SM532 Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers

Part No. SM532
Description  Low EMI Spectrum Spread Clock
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Maker  ETC1 [List of Unclassifed Manufacturers]
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SM532 Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers

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YJGP VKOKPI KU ETKVKECN
YJGP VKOKPI KU ETKVKECN
SM532
Approved Product
Low EMI Sprectum Spread Clock
International Microcircuits,Inc.
8/31/98
525 Los Coches St., Milpitas, 95035 408-263-6300, FAX 408-263-6571
Rev. 1.4
http:/www.imicorp.com
Page 8 of 14
SSCG Modulation Profile
The modulation rate of the SM532 within any range is typically 20 - 40 kHz. With the correct loop filter connected
to pin 5, the following profile will provide the best EMI reduction. This profile can be seen on a Time Domain
Analyzer.
Figure 4. Modulation Profile
THEORY OF OPERATION
The SM532 is a Phase Lock Loop (PLL) type clock generator using Direct Digital Synthesis (DDS).
By precisely
controlling the bandwidth of the output clock, the SM532 becomes a Low EMI clock generator. The theory and
detailed operation of the SM532 will be discussed in the following sections.
EMI
All digital clocks generate unwanted energy in their harmonics. Conventional digital clocks are square waves with
a duty cycle that is very close to 50 %. Because of the 50/50 duty cycle, digital clocks generate most of their
harmonic energy in the odd harmonics, i.e.; 3
rd, 5th, 7th etc. It is possible to reduce the amount of energy contained
in the fundamental and harmonics by increasing the bandwidth of the fundamental clock frequency. Conventional
digital clocks have a very high Q factor, which means that all of the energy at that frequency is concentrated in a
very narrow bandwidth, consequently, higher energy peaks. Regulatory agencies test electronic equipment by the
amount of peak energy radiated from the equipment.
By reducing the peak energy at the fundamental and
harmonic frequencies, the equipment under test is able to satisfy agency requirements for Electro-Magnetic
Interference (EMI). Conventional methods of reducing EMI have been to use shielding, filtering, multi-layer PCB’s
etc. The SM532 uses the approach of reducing the peak energy in the clock by increasing the clock bandwidth,
and lowering the Q.
50.000
50.156
50.312
50.468
50.625
49.844
49.687
49.531
Time (microseconds)
+1.25%
2.5%
-1.25%
0
5
10
15
20
25
30
35
Fmax
Fcenter
Fmin
49.375


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