SI5338_V01 datasheet(20/46 Pages) SILABS

Part #	SI5338

Description	I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR

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Manufacturer	SILABS [Silicon Laboratories]

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Si5338

20

Rev. 1.6

Synthesis of the output clocks is performed in two

stages, as shown in Figure 5. The first stage consists of

a high-frequency analog phase-locked loop (PLL) that

multiplies the input stage to a frequency within the

range of 2.2 to 2.84 GHz. Multiplication of the input

frequency is accomplished using a proprietary and

highly precise MultiSynth feedback divider (N), which

allows the PLL to generate any frequency within its

VCO range with much less jitter than typical fractional N

PLL.

Figure 5. Synthesis Stages

The second stage of synthesis consists of the output

MultiSynth dividers (MSx). Based on a fractional N

divider, the MultiSynth divider shown in Figure 6

switches seamlessly between the two closest integer

divider values to produce the exact output clock

frequency with 0 ppm error.

To eliminate phase error generated by this process, the

MultiSynth block calculates the relative phase difference

between the clock produced by the fractional-N divider

and the desired output clock and dynamically adjusts

the phase to match the ideal clock waveform. This novel

approach makes it possible to generate any output

clock frequency without sacrificing jitter performance.

This architecture allows the output of each MultiSynth to

produce any frequency from 5 to Fvco/8 MHz. To

support higher frequency operation, the MultiSynth

divider can be bypassed. In bypass mode, integer divide

ratios of 4 and 6 are supported. This allows for output

frequencies of Fvco/4 and Fvco/6 MHz, which translates

to 367–473.33 MHz and 550–710 MHz respectively.

Because each MultiSynth uses the same VCO output,

there are output frequency limitations when output

frequencies greater than Fvco/8 are desired.

For example, if 375 MHz is needed at the output of

MultiSynth0, the VCO frequency would need to be

2.25 GHz. Now, all the other MultiSynths can produce

any frequency from 5 MHz up to a maximum frequency

of 2250/8 = 281.25 MHz. MultiSynth1,2,3 could also

produce Fvco/4 = 562.5 MHz or Fvco/6 = 375 MHz. Only

two unique frequencies above Fvco/8 can be output:

Fvco/6 and Fvco/4.

Figure 6. Silicon Labs’ MultiSynth Technology

Phase

Frequency

Detector

Loop

Filter

VCO

MultiSynth

÷MS0

MultiSynth

÷MS1

MultiSynth

÷MS2

MultiSynth

÷MS3

MultiSynth

÷N

Synthesis

Stage 1

(APLL)

Synthesis

Stage 2

ref

fb

2.2-2.84 GHz

Fractional-N

Divider

Phase

Adjust

Phase Error

Calculator

Divider Select

(DIV1, DIV2)

fVCO

fOUT

MultiSynth

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