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## DRV8889-Q1 Datasheet(PDF) 62 Page - Texas Instruments

 Part No. DRV8889-Q1 Description DRV8889-Q1, DRV8889A-Q1 Automotive Stepper Driver with Integrated Current Sense, 1/256 Micro-Stepping, and Stall Detection Download 88 Pages Scroll/Zoom 100% Maker TI [Texas Instruments] Homepage http://www.ti.com Logo

## DRV8889-Q1 Datasheet(HTML) 62 Page - Texas Instruments

 62 / 88 page NoteThe rise-time (tRISE) and the fall-time (tFALL) are calculated based on typical values of the slew rate(tSR). This parameter is expected to change based on the supply-voltage, temperature and device todevice variation.The switching loss is inversely proportional to the output slew rate. 10 V/µs slew rate will result inapproximately ten times higher switching loss than 105 V/µs slew rate. However, lower slew rates tendto result in better EMC performance of the driver. A careful trade-off analysis needs to be performed toarrive at an appropriate slew rate for an application.The switching loss is directly proportional to the PWM switching frequency. The PWM frequency in anapplication will depend on the supply voltage, inductance of the motor coil, back emf voltage and OFFtime or the ripple current (for smart tune ripple control decay mode).8.2.4.1.3 Power Dissipation Due to Quiescent CurrentThe power dissipation due to the quiescent current consumed by the power supply is calculated as shown below-PQ = VVM x IVM(11)Substituting the values, quiescent power loss can be calculated as shown below -PQ = 13.5-V x 5-mA = 67.5-mW(12)NoteThe quiescent power loss is calculated using the typical operating supply current (IVM) which isdependent on supply-voltage, temperature and device to device variation.8.2.4.1.4 Total Power DissipationThe total power dissipation (PTOT) is calculated as the sum of conduction loss, switching loss and the quiescentpower loss as shown in Equation 13.PTOT = PCOND + PSW + PQ = 225-mW + 36.8-mW + 67.5-mW = 329.3-mW(13)8.2.4.2 PCB TypesThermal analysis in this section is focused for the 2-layer and 4-layer PCB with two different copper thickness (1-oz and 2-oz) and six different copper areas (1-cm2, 2-cm2, 4-cm2, 8-cm2, 16-cm2 and 32-cm2), for both HTSSOPand VQFN packages.Figure 8-13 and Figure 8-14 show the top-layer which is applicable for both 2/4-layer PCB, for HTSSOP andVQFN packages respectively. The top-layer, mid-layer-1 and bottom-layer of the PCB is filled with ground plane,whereas, the mid-layer-2 is filled with power plane.For the HTSSOP, 4 x 3 array of thermal vias with 300 µm drill diameter and 25 µm Cu plating were placed belowthe device package. For the VQFN, 2 x 2 array of thermal vias with 300 µm drill diameter and 25 µm Cu platingwere placed below the device package. Thermal vias contacted top-layer, bottom-layer, and mid-layer-1 (groundplane) if applicable. The mid-layers and the bottom-layer were modeled with size A * A for both 2-layer and 4-layer designs. For the VQFN package, there was no copper on top layer outside of device land area.The thickness of copper for different PCB layers in different PCB types is summarized in Table 8-3. The PCBdimension (A) for different PCB copper area is summarized in Table 8-4 for the HTSSOP package, and in Table8-5 for the VQFN package.DRV8889-Q1SLVSEE9C – APRIL 2020 – REVISED AUGUST 2020www.ti.com62Submit Document FeedbackCopyright © 2020 Texas Instruments IncorporatedProduct Folder Links: DRV8889-Q1