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DRV8889-Q1 Datasheet(PDF) 40 Page - Texas Instruments

Part No. DRV8889-Q1
Description  DRV8889-Q1, DRV8889A-Q1 Automotive Stepper Driver with Integrated Current Sense, 1/256 Micro-Stepping, and Stall Detection
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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DRV8889-Q1 Datasheet(HTML) 40 Page - Texas Instruments

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For a write command (W0 = 0), the response word on the SDO pin is the data currently in the register being
written to.
For a read command (W0 = 1), the response word is the data currently in the register being read.
Table 7-14. SDI Input Data Word Format
R/W
ADDRESS
DON'T
CARE
DATA
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
0
W0
A4
A3
A2
A1
A0
X
D7
D6
D5
D4
D3
D2
D1
D0
Table 7-15. SDO Output Data Word Format
STATUS
REPORT
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
1
1
UVLO
CPUV
OCP
STL
TF
OL
D7
D6
D5
D4
D3
D2
D1
D0
7.5.1.2 SPI for a Single Slave Device
The SPI is used to set device configurations, operating parameters, and read out diagnostic information. The SPI
operates in slave mode. The SPI input-data (SDI) word consists of a 16-bit word, with 8 bits command and 8 bits
of data. The SPI output data (SDO) word consists of 8 bits of status register with fault status indication and 8 bits
of register data. Figure 7-23 shows the data sequence between the MCU and the SPI slave driver.
nSCS
A1
D1
S1
R1
SDI
SDO
Figure 7-23. SPI Transaction Between MCU and the device
A valid frame must meet the following conditions:
• The SCLK pin must be low when the nSCS pin goes low and when the nSCS pin goes high.
• The nSCS pin should be taken high for at least 500 ns between frames.
• When the nSCS pin is asserted high, any signals at the SCLK and SDI pins are ignored, and the SDO pin is
in the high-impedance state (Hi-Z).
• Full 16 SCLK cycles must occur.
• Data is captured on the falling edge of the clock and data is driven on the rising edge of the clock.
• The most-significant bit (MSB) is shifted in and out first.
• If the data word sent to SDI pin is less than 16 bits or more than 16 bits, a frame error occurs and the data
word is ignored.
• For a write command, the existing data in the register being written to is shifted out on the SDO pin following
the 8-bit command data.
DRV8889-Q1
SLVSEE9C – APRIL 2020 – REVISED AUGUST 2020
www.ti.com
40
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: DRV8889-Q1


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