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DRV8889-Q1 Datasheet(PDF) 4 Page - Texas Instruments

Part No. DRV8889-Q1
Description  DRV8889-Q1, DRV8889A-Q1 Automotive Stepper Driver with Integrated Current Sense, 1/256 Micro-Stepping, and Stall Detection
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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DRV8889-Q1 Datasheet(HTML) 4 Page - Texas Instruments

 
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Pin Functions
PIN
I/O
TYPE
DESCRIPTION
NAME
NO.
HTSSOP
VQFN
AOUT1
6
3
O
Output
Winding A output. Connect to stepper motor winding.
AOUT2
7
4
O
Output
Winding A output. Connect to stepper motor winding.
PGND
5, 10
2, 7
Power
Power ground. Both PGND pins are shorted internally. Connect to system
ground on PCB.
BOUT1
9
6
O
Output
Winding B output. Connect to stepper motor winding
BOUT2
8
5
O
Output
Winding B output. Connect to stepper motor winding
CPH
2
23
Power
Charge pump switching node. Connect a X7R, 0.022-µF, VM-rated ceramic
capacitor from CPH to CPL.
CPL
1
22
DIR
22
19
I
Input
Direction input. Logic level sets the direction of stepping; internal pulldown
resistor.
DRVOFF
23
20
I
Input
Logic high to disable device outputs; logic low to enable; internal pullup to
DVDD.
DVDD
13
10
Power
Logic supply voltage. Connect a X7R, 0.47-µF, 6.3-V or 10-V rated ceramic
capacitor to GND.
GND
12
9
Power
Device ground. Connect to system ground.
VREF
15
12
I
Input
Current set reference input. Maximum value 3.3 V. DVDD can be used to
provide VREF through a resistor divider.
SCLK
20
17
I
Input
Serial clock input. Serial data is shifted out and captured on the
corresponding rising and falling edge on this pin.
SDI
19
16
I
Input
Serial data input. Data is captured on the falling edge of the SCLK pin
SDO
18
15
O
Push Pull Serial data output. Data is shifted out on the rising edge of the SCLK pin.
STEP
21
18
I
Input
Step input. A rising edge causes the indexer to advance one step; internal
pulldown resistor.
VCP
3
24
Power
Charge pump output. Connect a X7R, 0.22-μF, 16-V ceramic capacitor to VM.
VM
4, 11
1, 8
Power
Power supply. Connect to motor supply voltage and bypass to GND with two
0.01-µF ceramic capacitors (one for each pin) plus a bulk capacitor rated for
VM.
VSDO
17
14
Power
Supply pin for SDO output. Connect to 5-V or 3.3-V depending on the desired
logic level.
nFAULT
14
11
O
Open
Drain
Fault indication. Pulled logic low with fault condition; open-drain output
requires an external pullup resistor.
nSCS
16
13
I
Input
Serial chip select. An active low on this pin enables the serial interface
communications. Internal pullup to DVDD.
nSLEEP
24
21
I
Input
Sleep mode input. Logic high to enable device; logic low to enter low-power
sleep mode; internal pulldown resistor.
PAD
-
-
-
-
Thermal pad. Connect to system ground.
DRV8889-Q1
SLVSEE9C – APRIL 2020 – REVISED AUGUST 2020
www.ti.com
4
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: DRV8889-Q1


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