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CC3230S Datasheet(PDF) 24 Page - Texas Instruments |
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CC3230S Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 104 page  FUNCTION SIGNAL NAME PIN NO. PIN TYPE SIGNAL DIRECTION DESCRIPTION Multimedia card (MMC or SD) SDCARD_CLK 1 I/O O SD card clock data 7 SDCARD_CMD 2 I/O I/O (open drain) SD card command line 8 I/O I/O SDCARD_DATA0 6 I/O I/O SD card data 64 SDCARD_IRQ 63 I/O I Interrupt from SD card(3) Parallel interface (8-bit π) pXCLK (XVCLK) 2 I/O O Free clock to parallel camera pVS (VSYNC) 3 I/O I Parallel camera vertical sync pHS (HSYNC) 4 I/O I Parallel camera horizontal sync pDATA8 (CAM_D4) 5 I/O I Parallel camera data bit 4 pDATA9 (CAM_D5) 6 I/O I Parallel camera data bit 5 pDATA10 (CAM_D6) 7 I/O I Parallel camera data bit 6 pDATA11 (CAM_D7) 8 I/O I Parallel camera data bit 7 pCLK (PIXCLK) 55 I/O I Pixel clock from parallel camera sensor pDATA7 (CAM_D3) 58 I/O I Parallel camera data bit 3 pDATA6 (CAM_D2) 59 I/O I Parallel camera data bit 2 pDATA5 (CAM_D1) 60 I I Parallel camera data bit 1 pDATA4 (CAM_D0) 61 I/O I Parallel camera data bit 0 Power VDD_DIG1 9 — — Internal digital core voltage VIN_IO1 10 — — Device supply voltage (VBAT) VDD_PLL 24 — — Internal analog voltage LDO_IN2 25 — — Internal analog RF supply from analog DC/DC output VDD_PA_IN 33 — — Internal PA supply voltage from PA DC/DC output LDO_IN1 36 — — Internal analog RF supply from analog DC/DC output VIN_DCDC_ANA 37 — — Analog DC/DC input (connected to device input supply [VBAT]) DCDC_ANA_SW 38 — — Internal analog DC/DC switching node VIN_DCDC_PA 39 — — PA DC/DC input (connected to device input supply [VBAT]) DCDC_PA_SW_P 40 — — Internal PA DC/DC switching node DCDC_PA_SW_N 41 — — Internal PA DC/DC switching node DCDC_PA_OUT 42 — — Internal PA buck converter output DCDC_DIG_SW 43 — — Internal digital DC/DC switching node VIN_DCDC_DIG 44 — — Digital DC/DC input (connected to device input supply [VBAT]) DCDC_ANA2_SW_P 45(1) — — Analog to DC/DC converter +ve switching node DCDC_ANA2_SW_N 46 — — Internal analog to DC/DC converter –ve switching node VDD_ANA2 47 — — Internal analog to DC/DC output VDD_ANA1 48 — — Internal analog supply fed by ANA2 DC/DC output VDD_RAM 49 — — Internal SRAM LDO output VIN_IO2 54 — — Device supply voltage (VBAT) VDD_DIG2 56 — — Internal digital core voltage Reset nRESET 32 I I Global master device reset (active low) RF RF_BG 31 I/O I/O WLAN analog RF 802.11 b/g/n bands CC3230S, CC3230SF SWRS226 – FEBRUARY 2020 www.ti.com 24 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: CC3230S CC3230SF |
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