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SARA-N2 Datasheet(PDF) 9 Page - u-blox AG |
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SARA-N2 Datasheet(HTML) 9 Page - u-blox AG |
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9 / 30 page  SARA-N2 series - Data Sheet UBX-15025564 - R16 Interfaces Page 9 of 30 2.4 SIM interface A SIM card interface is provided by the VSIM, SIM_IO, SIM_CLK, and SIM_RST pins of SARA-N2 series modules, supporting 1.8 V SIM card/chip types. 2.5 Serial interfaces 2.5.1 Asynchronous serial interface (UART) The UART interface is a 5-wire unbalanced asynchronous serial interface available for communication with an application host processor (AT commands and data communication) and for FW upgrade. The main characteristics of the interface are the following: Serial port with RS-232 functionality working at the VCC voltage domain (0 V for low data bit or ON state and ~3.6 V, i.e. VCC, for high data bit or OFF state) Data lines (RXD as module data output, TXD as module data input) Hardware flow control lines (CTS as module output, RTS as module input) The following baud rates are supported: 4800, 9600 (default baud rate), 57600 and 115200 b/s. Fixed frame format: 8N1 (8 data bits, no parity, 1 stop bit) The CTS line can be configured as RING indicator, to signal an incoming message received by the module or an URC event, or as Network status indicator (for more details see section 2.6 and the u-blox SARA-N2 series AT Commands Manual [1], +URING, +UGPIOC AT commands). ☞ For FW upgrade purposes, connect a test point to the RXD and TXD pins. ☞ Hardware flow control function is not supported by the "02" product versions. 2.5.2 Secondary asynchronous serial interface (Secondary UART) The secondary UART interface is a 2-wire unbalanced asynchronous serial interface available for diagnostic purpose, to capture trace diagnostic logs delivered by the module. The main characteristics of the interface are: Serial port with RS-232 functionality working at the V_INT voltage domain (0 V for low data bit or ON state and 1.8 V, i.e. V_INT, for high data bit or OFF state) Data line (GPIO1 as module data output) No flow control Fixed baud rate: 921600 b/s Fixed frame format: 8N1 (8 data bits, no parity, 1 stop bit) ☞ For diagnostic purposes, connect a test point to the GPIO1 pin. ☞ The trace diagnostic log is temporarily stopped when the module is in deep-sleep mode. |
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