97SD3248 datasheet(7/40 Pages) MAXWELL

Part #	97SD3248

Description	1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks

Download	40 Pages

Scroll/Zoom	100%

Manufacturer	MAXWELL [Maxwell Technologies]

Direct Link	http://www.maxwell.com

Logo

7 / 40 page

97SD3248

7

All data sheets are subject to change without notice

1.5Gb (8-Meg X 48-Bit X 4-Banks) SDRAM

02.04.05 Rev 3

Pin Functions:

CLK (INPUT PIN): CLK is the master clock input to this pin. The other input signals are referred at CLK rising

edge.

CS 1-6 (INPUT PINS): When CS 1-6 are low, the command input cycle becomes valid. When CS 1-6 are High,

all inputs are ignored. However, internal operations (bank active, burst operations, etc.) are held.

RAS, CAS AND WE (INPUT PINS): Although these pin names are the same as those of conventional DRAMs,

they function in a different way. These pins define operation commands (read, write, etc.) depending on the

combination of their voltage levels.

A0 TO A12 (INPUT PINS): Row address (AX0 to AX12) is determined by A0 to A12 level at the bank active

command cycle CLK rising edge. Column address (AY0 to AY9) is determined by A0 to A9 level at the read

or write command cycle CLK rising edge. And this column address becomes burst access start address.

A10 defines the precharge mode. When A10 = High at the precharge command cycle, all banks are pre-

charged. But when A10 = Low at the precharge command cycle, only the bank that is selected by BA0/BA1

(BS) is pre charged.

BA0/BA1 (INPUT PINS): BA0/BA1 are bank select signals (BS). The memory array of the 97SD3248 is divided

into bank 0, bank 1, bank 2 and bank 3. The 97SD3248 contains 8192-row X 1024-column X 48-bit. If BA0

and BA1 is Low, bank 0 is selected. If BA0 is Low and BA1 is High, bank 1 is selected. If BA0 is High and

BA1 is Low, bank 2 is selected. If BAO is High and BA1 is High, bank 3 is selected.

CKE (INPUT PIN): This pin determines whether or not the next CLK is valid. If CKE is High, the next CLK rising

edge is valid. If CKE is Low, the next CLK rising edge is invalid. This pin is used for power-down mode,

clock suspend mode and self refresh mode1.

DQM 1-6 (INPUT PINS): DQM 1-6 control input/output buffers

Read operation: If DQM 1-6 are High, the output buffer becomes High-Z. If the DQM 1-6 are Low, the output

buffer becomes Low-Z. ( The latency of DQM 1-6 during reading is 2 clock cycles.)

Write operation: If DQM 1-6 are High, the previous data is held ( the new data is not written). If the DQM 1-6

areLow, the data is written. ( The latency of DQM 1-6 during writing is 0 clock cycles.)

DQ0 TO DQ47 (DQ PINS): Data is input to and output from these pins ( DQ0 to DQ47).

V

CC AND VCCQ (POWER SUPPLY PINS): 3.3V is applied. ( VCC is for the internal circuit and VCCQ is for the output

buffer.)

V

SS AND VSSQ (POWER SUPPLY PINS): Ground is connected. (VSS is for the internal circuit and VSSQ is for the

output buffer.)

1. Self refresh mode should only be used at temperatures below 70°C.

Similar Part No. - 97SD3248

Manufacturer	Part #	Datasheet	Description
Maxwell Technologies	97SD3248	583Kb / 40P	1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks
Maxwell Technologies	97SD3248	583Kb / 40P	1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks

More results

Similar Description - 97SD3248

Manufacturer	Part #	Datasheet	Description
Maxwell Technologies	97SD3248	583Kb / 40P	1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks
	97SD3240	760Kb / 39P	1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks
	97SD3240	738Kb / 39P	1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks
	48SD3208	589Kb / 39P	256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks
Micron Technology	MT48LC16M16A2P-75DTR	3Mb / 86P	SDR SDRAM MT48LC64M4A2 ??16 Meg x 4 x 4 banks MT48LC32M8A2 ??8 Meg x 8 x 4 banks MT48LC16M16A2 ??4 Meg x 16 x 4 banks
	MT41J64M16JT-125G	2Mb / 214P	DDR3 SDRAM MT41J256M4 ??32 Meg x 4 x 8 banks MT41J128M8 ??16 Meg x 8 x 8 banks MT41J64M16 ??8 Meg x 16 x 8 banks
	MT47H64M16HR-25EITH	9Mb / 134P	DDR2 SDRAM MT47H256M4 ??32 Meg x 4 x 8 banks MT47H128M8 ??16 Meg x 8 x 8 banks MT47H64M16 ??8 Meg x 16 x 8 banks
	MT48LC32M16A2P-75ITC	3Mb / 77P	SDR SDRAM MT48LC128M4A2 ??32 Meg x 4 x 4 banks MT48LC64M8A2 ??16 Meg x 8 x 4 banks MT48LC32M16A2 ??8 Meg x 16 x 4 banks
	MT47H64M8CF-25EG	9Mb / 132P	DDR2 SDRAM MT47H128M4 ??32 Meg x 4 x 4 banks MT47H64M8 ??16 Meg x 8 x 4 banks MT47H32M16 ??8 Meg x 16 x 4 banks
Maxwell Technologies	97SD3232	764Kb / 39P	1 Gb SDRAM 8-Meg X 32 Bit X 4-Banks

More results

97SD3248 Datasheet(PDF) 7 Page - Maxwell Technologies

97SD3248 Datasheet(HTML) 7 Page - Maxwell Technologies

Similar Part No. - 97SD3248

Similar Description - 97SD3248

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Datasheet Download

Link URL