16-Bit DACs with 16-Channel

Sample-and-Hold Outputs

4

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Note 1: The nominal zero-scale (code = 0) voltage is -4.0535V. The nominal full-scale (code = FFFF hex) voltage is +9.0535V. The

output voltage is limited by the Output Range specification, restricting the usable range of DAC codes. The nominal zero-

Note 2: Gain is calculated from measurements:

Note 3: Steady-state change in any output with an 8V change in an adjacent output.

Note 4: Settling during the first update for an 8V step. The output settles to within the linearity specification on subsequent updates.

Tested with an external sequencer clock frequency of 480kHz.

Note 5: External clock mode with the external clock not toggling.

Note 6: The output voltage is the sum of the DAC output and the voltage at GS. GS gain is measured at 4F2C hex.

limited by acceptable droop and update time after a Burst Mode Update.

Note 9: Guaranteed by gain-error test.

ELECTRICAL CHARACTERISTICS (continued)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCLK High to

CS High Hold Time

0ns

DIN to SCLK High Setup Time

15

ns

DIN to SCLK High Hold Time

0ns

RST to CS Low

(Note 8)

500

µs

POWER SUPPLIES

Positive Supply Voltage

(Note 9)

8.55

10

11.60

V

Negative Supply Voltage

(Note 9)

-5.25

-4

-2.75

V

Supply Difference

14.5

V

Logic Supply Voltage

4.75

5

5.25

V

Positive Supply Current

32

42

mA

Negative Supply Current

32

40

mA

(Note 10)

1

1.5

Logic Supply Current

2

3

mA