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IN74HCT373A Datasheet(PDF) 1 Page - Integral Corp.

Part No. IN74HCT373A
Description  Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS
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Maker  INTEGRAL [Integral Corp.]
Homepage  http://www.iksemi.com/
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IN74HCT373A Datasheet(HTML) 1 Page - Integral Corp.

   
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TECHNICAL DATA
371
Octal 3-State Noninverting
Transparent Latch
High-Performance Silicon-Gate CMOS
The IN74HCT373A may be used as a level converter for
interfacing TTL or NMOS outputs to High-Speed CMOS inputs.
The IN74HCT373A is identical in pinout to the LS/ALS373.
The eight latches of the IN74HCT373A are transparent D-type
latches. While the Latch Enable is high the Q outputs follow the Data
Inputs. When Latch Enable is taken low, data meeting the setup and
hold times becomes latched.
The Output Enable does not affect the state of the latch, but when
Output Enable is high, all outputs are forced to the high-impedance
state. Thus, data may be latched even when the outputs are not
enabled.
• TTL/NMOS-Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
IN74HCT373A
ORDERING INFORMATION
IN74HCT373AN Plastic
IN74HCT373ADW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Output
Output
Enable
Latch
Enable
DQ
LH
H
H
LH
L
L
L
L
X
No Change
HX
X
Z
X = Don’t Care
Z = High Impedance
LOGIC DIAGRAM
PIN 20=VCC
PIN 10 = GND


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