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STK14C88-M Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

Part No. STK14C88-M
Description  32K x 8 AUTOSTORE nvSRAM QUANTUM TRAP CMOS NONVOLATILE STATIC RAM
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Maker  ETC1 [List of Unclassifed Manufacturers]
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STK14C88-M Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

 
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April 1999
5-43
STK14C88-M
32K x 8
AutoStore™ nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
MIL-STD-883
FEATURES
• Nonvolatile Storage without Battery Problems
• 35ns and 45ns Access Times
• “Hands-off” Automatic
STORE with External
68
µF Capacitor on Power Down
STORE to EEPROM Initiated by Hardware,
Software or
AutoStore™ on Power Down
RECALL to SRAM Initiated by Software or
Power Restore
• 10mA Typical I
CC at 200ns Cycle Time
• Unlimited READ, WRITE and
RECALL Cycles
• 100,000
STORE Cycles to EEPROM
• 10-Year Data Retention in EEPROM
• Single 5V + 10% Operation
• Not Sensitive to Power On/Off Ramp Rates
• No Data Loss from Undershoot
• 32-Pad LCC and 32-Pin 300 mil CDIP Packages
DESCRIPTION
The Simtek STK14C88-M is a fast static RAM with a
nonvolatile, electrically erasable PROM element
incorporated in each static memory cell. The SRAM
can be read and written an unlimited number of
times, while independent nonvolatile data resides in
EEPROM
. Data transfers from the SRAM to the
EEPROM
(the STORE operation) can take place auto-
matically on power down. A 68
µF or larger capacitor
tied from V
CAP
to ground guarantees the STORE
operation, regardless of power-down slew rate or
loss of power from “hot swapping”. Transfers from
the EEPROM to the SRAM (the RECALL operation)
take place automatically on restoration of power. Ini-
tiation of STORE and RECALL cycles can also be
software
controlled
by
entering
specific
read
sequences. A hardware STORE may be initiated with
the HSB pin.
BLOCK DIAGRAM
A0 A1 A2 A3 A4 A10
COLUMN I/O
COLUMN DEC
STATIC RAM
ARRAY
512 x 512
EEPROM ARRAY
512 x 512
STORE/
RECALL
CONTROL
STORE
RECALL
POWER
CONTROL
A5
A6
A7
A8
A9
A11
A12
A13
A14
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
SOFTWARE
DETECT
G
E
W
HSB
VCCX
VCAP
A0 - A13
PIN CONFIGURATIONS
PIN NAMES
A0 - A14
Address Inputs
DQ0 -DQ7
Data In/Out
E
Chip Enable
W
Write Enable
G
Output Enable
HSB
Hardware Store Busy (I/O)
VCCX
Power (+ 5V)
VCAP
Capacitor
VSS
Ground
9
7
8
10
11
LCC
32
7
DQ
E
31
8
3
A
A
27
A
29
1
A
A
23
5
20
25
8
A
7
26
4
A
12
5
6
13
32
2
NC
10
9
13
16
A
A
A
15
9
4
A
14
11
28
21
10
2
0
19
11
3
6
1
30
A
G
24
22
17
NC
18
DQ
0
15
A
4
W
DQ
DQ
A
2
13
NC
1
3
8
17
G
7
26
DQ
16
9
5
1
HSB
A
18
22
12
A
23
4
A
27
V
5
SS
DQ
0
7
A
1
0
CAP
3
28
13
6
14
DQ
6
10
5
24
20
DQ
A
V
A
29
CCX
DQ
A
A
19
6
A
12
A
A
V
DQ
31
25
2
2
E
30
A
NC
4
32
14
11
3
A
21


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