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TPS2070 Datasheet(PDF) 4 Page - Texas Instruments

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Part No. TPS2070
Description  FOUR-PORT USB HUB POWER CONTROLLERS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS2070 Datasheet(HTML) 4 Page - Texas Instruments

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TPS2070, TPS2071
FOUR-PORT USB HUB POWER CONTROLLERS
SLVS287A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description
BP
The bus-powered supply input (BP) serves as the source for the internal 3.3-V LDO and for all logic functions
in the device. In bus-powered mode, BP also serves as the source for all the outputs (OUTx). If BP is below the
undervoltage threshold, all power switches will turn off and the LDO will be disabled. BP must be connected to
a voltage source in order for the device to operate.
SP
The self-powered supply input (SP) serves as the source for all the outputs (OUTx) in self-powered mode. The
enable logic for the SP switches requires that BP be connected to a voltage source.
OUT1, OUT2, OUT2, OUT4
OUTx are the outputs of the integrated power switches.
3.3V_OUT
The internal 3.3-V LDO output can be used to supply up to 100 mA current to low-power functions, such as hub
controllers.
VEXT
VEXT is used to generate a 5-V source for the SP input by using the internal LDO controller and an external
N-channel MOSFET. This pin connects to a 6-V to 9-V power supply and to the drain of the MOSFET if the
external LDO is needed.
GATE
GATE is the output of the 5-V LDO controller and connects to the gate of the external MOSFET.
EN_REG
The active-high input, EN_REG, is used to enable the 5-V regulator controller. EN_REG is compatible with TTL
and CMOS logic levels.
DP0_RST
DP0_RST functions as a hub reset when a 1.5-k
Ω resistor is connected between DP0_RST and the upstream
DP0 data line in a hub system. To provide a clean attach signal on DP0 data line, the DP0_RST output goes
low momentarily (because of the upstream pulldown resistor) to discharge any parasitic charge on the cable,
then goes to 3-state and finally outputs a high signal. The low and Hi-Z pulse widths are adjustable using a
capacitor between PG_DLY and ground, and are approximately 50% of the power-good time delay. Detachment
is signaled by a Hi-Z on DP0_RST. Both DP0_RST and PG will transition high at the same time.
Power Good (PG)
The power good (PG) function serves as a reset for a USB hub controller. PG is asserted low when the output
voltage on the internal voltage regulator is below a fixed threshold. A time delay to ensure a stable output voltage
before PG goes high is adjustable using a small-value ceramic capacitor from PG_DLY to ground.
PG_DLY
PG_DLY connects to an external capacitor to adjust the time delay for PG and DP0_RST. For USB applications,
a 0.1-
µF capacitor is recommended, however, reference the USB Hub Controller data sheet to determine the
needed pulsewidth criteria.


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