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MC74VHCT540ADT Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74VHCT540ADT Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1 REV 0 © Motorola, Inc. 1999 4/99 Octal Bus Buffer Inverting The MC74VHCT540A is an advanced high speed CMOS inverting octal bus buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHCT540A features inputs and outputs on opposite sides of the package and two AND–ed active–low output enables. When either OE1 or OE2 are high, the terminal outputs are in the high impedance state. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS level output swings. The VHCT540A input and output (when disabled) structures provide protection when voltages between 0V and 5.5V are applied, regardless of the supply voltage. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup, hot insertion, etc. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems. • High Speed: tPD = 3.7ns (Typ) at VCC = 5V • Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C • TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Designed for 2V to 5.5V Operating Range • Low Noise: VOLP = 1.2V (Max) • Pin and Function Compatible with Other Standard Logic Families • Latchup Performance Exceeds 300mA • ESD Performance: HBM > 2000V; Machine Model > 200V • Chip Complexity: 124 FETs or 31 Equivalent Gates 18 Y1 2 A1 17 Y2 3 A2 16 Y3 4 A3 15 Y4 5 A4 14 Y5 6 A5 13 Y6 7 A6 12 Y7 8 A7 11 Y8 9 A8 OE1 OE2 1 19 OUTPUT ENABLES DATA INPUTS INVERTING OUTPUTS LOGIC DIAGRAM MC74VHCT540A PIN ASSIGNMENT A5 A3 A2 A1 OE1 GND A8 A7 A6 A4 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 Y3 Y2 Y1 OE2 VCC Y8 Y7 Y6 Y5 Y4 L L H X L L X H L H X X FUNCTION TABLE Inputs Output Y OE1 OE2 A H L Z Z DW SUFFIX 20–LEAD SOIC WIDE PACKAGE CASE 751D–05 ORDERING INFORMATION MC74VHCTXXXADW MC74VHCTXXXADT MC74VHCTXXXAM SOIC WIDE TSSOP SOIC EIAJ DT SUFFIX 20–LEAD TSSOP PACKAGE CASE 948E–02 M SUFFIX 20–LEAD SOIC EIAJ PACKAGE CASE 967–01 |
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