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LT3023 Datasheet(PDF) 8 Page - Linear Technology |
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LT3023 Datasheet(HTML) 8 Page - Linear Technology |
8 / 16 page 8 LT3023 3023f SHDN1/SHDN2 (Pins 7/9): Shutdown. The SHDN1/SHDN2 pins are used to put the corresponding channel of the LT3023 regulator into a low power shutdown state. The output will be off when the pin is pulled low. The SHDN1/SHDN2 pins can be driven either by 5V logic or open-collector logic with pull-up resistors. The pull-up resistors are required to supply the pull-up current of the open-collector gates, normally several microamperes, and the SHDN1/SHDN2 pin current, typically 1 µA. If unused, the pin must be connected to VIN. The device will not function if the SHDN1/SHDN2 pins are not connected. IN (Pin 8): Input. Power is supplied to the device through the IN pin. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor in the range of 1 µF to 10µF is sufficient. The LT3023 regulator is designed to withstand reverse volt- ages on the IN pin with respect to ground and the OUT pin. In the case of a reverse input, which can happen if a battery is plugged in backwards, the device will act as if there is a diode in series with its input. There will be no reverse current flow into the regulator and no reverse voltage will appear at the load. The device will protect both itself and the load. Exposed Pad (Pin 11): Ground. This pin must be soldered to the PCB and electrically connected to ground. GND (Pin 3): Ground. ADJ1/ADJ2 (Pins 4/2): Adjust Pin. These are the inputs to the error amplifiers. These pins are internally clamped to ±7V. They have a bias current of 30nA which flows into the pin (see curve of ADJ1/ADJ2 Pin Bias Current vs Tempera- ture in the Typical Performance Characteristics section). The ADJ1 and ADJ2 pin voltage is 1.22V referenced to ground and the output voltage range is 1.22V to 20V. BYP1/BYP2 (Pins 5/1): Bypass. The BYP1/BYP2 pins are used to bypass the reference of the LT3023 regulator to achieve low noise performance from the regulator. The BYP1/BYP2 pins are clamped internally to ±0.6V (one VBE) from ground. A small capacitor from the correspond- ing output to this pin will bypass the reference to lower the output voltage noise. A maximum value of 0.01 µF can be used for reducing output voltage noise to a typical 20 µVRMS over a 10Hz to 100kHz bandwidth. If not used, this pin must be left unconnected. OUT1/OUT2 (Pins 6/10): Output. The outputs supply power to the loads. A minimum output capacitor of 1 µF is required to prevent oscillations. Larger output capacitors will be required for applications with large transient loads to limit peak voltage transients. See the Applications Information section for more information on output ca- pacitance and reverse output characteristics. PI FU CTIO S |
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