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IH6208 Datasheet(PDF) 1 Page - Harris Corporation

Part No. IH6208
Description  8-Channel CMOS Analog Multiplexer
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Maker  HARRIS [Harris Corporation]
Homepage  http://www.harris.com
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IH6208 Datasheet(HTML) 1 Page - Harris Corporation

   
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12-129
Semiconductor
April 1999
IH6208
8-Channel
CMOS Analog Multiplexer
Features
• Ultra Low Leakage - ID(OFF) ≤ 100pA (Typ)
•rDS(ON) < 400Ω Over Full Signal and Temperature
Range
• Power Supply Quiescent Current Less Than 100
µA
±14V Analog Signal Range
• No SCR Latchup
• Break-Before-Make Switching
• Binary Address Control (2 Address Inputs Control 2
Out of 8 Channels)
• TTL and CMOS Compatible Address Control
• Pin Compatible with DG509A, HI-509 and ADG509A
• Internal Diode in Series with V+ for Fault Protection
Description
The IH6208 is a CMOS 2 of 8 multiplexer. The part is a
plug-in replacement for the DG509A. Two-line binary
decoding is used so that the 8 channels can be controlled in
pairs by the binary inputs; additionally a third input is
provided for use as a system enable. When the ENABLE
input is high (5V), the channels are sequenced by the 2 line
binary inputs, and when low (0V) all channels are off. The 2
Address inputs arecontrolled by TTL logic or CMOS logic
elements with a “0” corresponding to any voltage less than
0.8V and a “1” corresponding to any voltage greater than
2.4V. Note that the ENABLE input must be taken to 5V to
enable the system, and less than 0.8V to disable the system.
Pinout
IH6208
(CERDIP, PDIP)
TOP VIEW
Functional Diagram
Part Number Information
PART
NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
IH6208MJE
-55 to 125
16 Ld CERDIP
F16.3
IH6208MJE/883B
-55 to 125
16 Ld CERDIP
F16.3
IH6208MFE/883B
-55 to 125
16 Ld Flat Pack
K16.A
IH6208CJE
0 to 70
16 Ld CERDIP
F16.3
IH6208CPE
0 to 70
16 Ld PDIP
E16.3
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
A0
EN
V-
S2a
S3a
S4a
A1
V+
S2b
S3b
S4b
GND
Db
S1b
S1a
Da
TRUTH TABLE
A1
A0
EN
ON SWITCH PAIR
x
x
0
None
0
0
1
1a, 1b
0
1
1
2a, 2b
1
0
1
3a, 3b
1
1
1
4a, 4b
NOTE: A0, A1
Logic “1” = VAH ≥ 2.4V, VENH ≥ 4.5V
Logic “0” = VAL ≤ 0.8V.
S1a
S2a
S3a
S4a
S1b
S3b
S4b
S2b
Da
Db
ADDRESS DECODER
1 OF 4
ENABLE
INPUT
A0 A1
EN
2 LINE BINARY ADDRESS INPUTS
ABOVE EXAMPLE SHOWS
(0 0) AND EN = 5V (EN = “1” for +5V, “0” for 0V)
CHANNELS 1a AND 1b ON.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
File Number
3157.2
OBSOLETE
PRODUCT
POSSIBLE
SUBSTITUTE
PRODUCT
DG409,
DG509A,
HI-0509(A)


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