HIP5500 datasheet(1/12 Pages) INTERSIL | High Voltage IC Half Bridge Gate Driver

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HIP5500

July 1998

File Number 3210.3

Features

• 500V Maximum Rating

• 2A Peak Gate Drive

• Ability to Interface and Drive N-Channel Power

Devices With Complimentary Outputs For Buffered

FETs

• Fault Output, Overcurrent Detection and Undervoltage

Holdoff

• Over 600kHz Sawtooth Oscillator Frequency

• Adjustable Deadtime Control

• Soft-Start Capability

• Low Current Standby State

• Sleep Mode Reduces Bias Current When Not Enabled

Applications

• Switching and Distributed Power Supplies

• Electronic Lighting Supplies

High Voltage IC Half Bridge Gate Driver

The HIP5500, a high voltage integrated circuit (HVIC) half-

bridge gate driver for standard power MOSFETs, IGBTs,

and the new Intersil Buffered MOSFET (RFV10N50BE), can

be employed in a wide variety of switching regulator circuits.

The HIP5500 combines the functionality and flexibility of a

PWM IC with the convenience of a high voltage half-bridge

driver optimized for power supply inverters. It can be used

either open-loop or in closed-loop fashion using the SS input

for controlling the output waveform duty-cycle.

The HIP5500 incorporates a precision oscillator, adjustable

using an external resistor and capacitor. The resistor sets

the capacitor charging current and the capacitor sets the

integration time of a triangle wave. Another resistor

connected to the DIS pin adjusts the dead-time and can be

tailored to the application. The oscillator switches at twice

the output waveform fundamental frequency. The result is an

output waveform whose positive and negative half-cycles

are near perfect balance (volt-second equalization).

Short-Detect (SD) and Soft-Start (SS) inputs provide

alternative means for limiting and regulating respectively the

half-bridge output voltage. A capacitor on the SS input will

begin charging up once the EN input is made high and

causes the duty cycle of each half-cycle to “ramp” the duty

cycle of the output waveform.

The SD input can sense a signal proportional to current,

providing a means of shortening the conduction periods

below that imposed by the SS input.

Other circuits within the HIP5500 “match” upper and lower

turn-on and turn-off propagation times in order to minimize

flux imbalances when driving output transformer loads.

Pinout

HIP5500 (PDIP, SOIC)

TOP VIEW

Ordering Information

PART

NUMBER

TEMPERATURE

RANGE

PACKAGE

HIP5500IP

-40oC to +85oC

20 Lead Plastic DIP

HIP5500IB

-40oC to +85oC

20 Lead Plastic

SOIC (W)

DIS

FLT

OSC

GND

VCC

PART W

ITHDRA

PROCE

SS OBS

OLETE

NO NEW

DESIGN

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