Electronic Components Datasheet Search |
|
DS280DF810 Datasheet(PDF) 26 Page - Texas Instruments |
|
DS280DF810 Datasheet(HTML) 26 Page - Texas Instruments |
26 / 51 page 26 DS280DF810 SNLS538A – SEPTEMBER 2016 – REVISED OCTOBER 2019 www.ti.com Product Folder Links: DS280DF810 Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated 8.3.1.9.2 Output Driver Polarity Inversion In some applications, it may be necessary to invert the polarity of the data transmitted from the retimer. To invert the polarity of the data, read back the FIR polarity settings for the pre-cursor, main-cursor, and post-cursor taps and then invert all of these polarities. Refer to the DS280DF810 Programming Guide for more details. 8.3.2 Debug Features The DS280DF810 has multiple features to aid diagnostics, board manufacturing, and system debug. These key features are: • Pattern Generator • Pattern Checker • Eye Opening Monitor • Interrupt Signals 8.3.2.1 Pattern Generator Each channel in the DS280DF810 can be configured to generate a 16-bit user-defined data pattern or a pseudo random bit sequence (PRBS). The user defined pattern can also be set to automatically invert every other 16-bit symbol for DC balancing purposes. The DS280DF810 pattern generator supports the following PRBS sequences: • PRBS – 27 - 1 • PRBS – 29 - 1 • PRBS – 211 - 1 • PRBS – 215 - 1 • PRBS – 223 - 1 • PRBS – 231 - 1 • PRBS – 258 - 1 • PRBS – 263 - 1 8.3.2.2 Pattern Checker The pattern checker can be manually set to look for specific PRBS sequences and polarities or it can be set to automatically detect the incoming pattern and polarity. The PRBS checker supports the same set of PRBS patterns as the PRBS generator. The pattern checker consists of an 11-bit error counter. The pattern checker uses 32- bit words, but every bit in the word is checked for error, so the error count represents the count of single bit errors. In order to read out the bit and error counters, the pattern checker must first be frozen. Continuous operation with simultaneous read out of the bit and error counters is not supported in this implementation. Once the bit and error counter is read, they can be un-frozen to continue counting. 8.3.2.3 Eye Opening Monitor The DS280DF810’s Eye Opening Monitor (EOM) measures the internal data eye at the input of the decision slicer and can be used for 2 functions: 1. Horizontal Eye Opening (HEO) and Vertical Eye Opening (VEO) measurement 2. Full Eye Diagram Capture The HEO measurement is made at the 0 V crossing and is read in channel register 0x27. The VEO measurement is made at the 0.5 UI mark and is read in channel register 0x28. The HEO and VEO registers can be read from channel registers 0x27 and 0x28 at any time while the CDR is locked. The following equations are used to convert the contents of channel registers 0x27 and 0x28 into their appropriate units: • HEO [UI] = Reg_0x27 ÷ 32 • VEO [mV] = Reg_0x28 x 3.125 |
Similar Part No. - DS280DF810_V01 |
|
Similar Description - DS280DF810_V01 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |