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HIP5062DY Datasheet(PDF) 6 Page - Intersil Corporation |
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HIP5062DY Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 7 page 6 32 CKIN Clock input when XCKS is grounded. 33 XCKS Grounding this terminal provides for the application of an external clock to CKIN input terminal. For normal internal clock operation, this terminal may be left floating or returned to 12V. There is an internal 30K pull-up resistor on this terminal. 34 DGND Ground of the DMOS gate drivers. This pad is used for bypassing. 35 AGND Analog ground. 36 VINP Internal 5.1V reference. This point is usually bypassed. 37 IRFO2 A resistor placed between this pad and IRFI2 converts the VCMP2 signal to a current for the cur- rent sense comparator. The maximum current set by the value of the resistor, according to the equation: IPEAK = 16/R. Where R is the value of the external resistor in KΩ and must be greater than 1.5K Ω but less than 10KΩ. For example, if the resistor chosen is 1.8K, the peak current will be 8.8A. This assumes VCMP2 is 7.3V. Maximum output current should be kept below 10A. 38 IRFI2 See IRFO2. 39 TMON This is the thermal shut down pad than can be used to disable the thermal shutdown circuit. By returning this pad to VDDA or 12V the function is disabled. Returning this pad to ground will put the IC into the thermal shutdown state. Thermal shutdown occurs at a nominal junction temper- ature or +120oC. This terminal is normally returned to ground. 40 V+ This is the main supply voltage input pad to the regulator IC. Because of the high peak currents this pad must be well bypassed with at least a 0.1 µF capacitor. Pin Descriptions (Continued) PAD NUMBER DESIGNATION DESCRIPTION HIP5062 |
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