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HI2303 Datasheet(PDF) 4 Page - Intersil Corporation

Part No. HI2303
Description  Triple 8-Bit, 50 MSPS, Video A/D Converter with Clamp Function
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HI2303 Datasheet(HTML) 4 Page - Intersil Corporation

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4
30, 35, 41, 42, 62,
68
AVDD
Analog +5V Power Supply.
43
59
TEST
I
Normally open. Pull-down
resistors are incorporated.
44
45
46
XAOE
XBOE
XCOE
I
Output Enable Input. When these
pins are Low, data is output from
the digital output pins. When these
pins are High, the digital output
pins are High impedance. The A, B
and C Channels can be controlled
separately. Also, these pins are not
synchronized with the clock signal.
Pull-down
resistors
are
incorporated.
47
48
49
CTL0
CTL1
CLT2
I
Determines
the
digital
output
mode. See the Mode tables and
Timing
Charts.
Pull-down
resistors are incorporated.
50
SY
I
Controls the digital output mode
switching timing. The mode is
switched
by
detecting
the
transition point where this pin
changes from Low to High. See
the Mode Tables and Timing
Charts for details. A pull-down
resister is incorporated.
51
SEL
I
Controls the CLP signal polarity.
When this pin is Low, CLP is High
active.
When this pin is High, CLP is Low
active. This pin has a built-in pull-
down resistor.
52
CLK
I
Clock Input. A pull-down resistor is
incorporated.
53
CLP
I
Clamp Pulse Input. The polarity
can be set to either High or Low by
setting SEL. This pin has a built-in
pull-down resistor.
54
55
56
57
REF0
REF1
REF2
REF3
I
Determines
the
clamp
circuit
reference data. See the mode
tables for the set data. These pins
are not synchronized with the
clock
input
signal.
Pull-down
resistors are incorporated.
58
CLE
I
Clamp Enable. When this pin is Low
the clamp circuit does not operate.
When this pin is High, the clamp
circuit
operates.
A
pull-down
resistor is incorporated.
Pin Description (Continued)
PIN NO.
SYMBOL
EQUIVALENT CIRCUIT
DESCRIPTION
AVDD
AVSS
AVDD
AVSS
HI2303


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