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MC68030FE33 Datasheet(PDF) 96 Page - Motorola, Inc

Part No. MC68030FE33
Description  ENHANCED 32-BIT MICROPROCESSOR
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MC68030FE33 Datasheet(HTML) 96 Page - Motorola, Inc

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Instruction Set Summary
3-18
MC68030 USER’S MANUAL
MOTOROLA
3.4 INSTRUCTION SET SUMMARY
Table 3–14 provides a alphabetized listing of the MC68030 instruction set listed by opcode,
operation, and syntax.
Table 3–14 use notational conventions for the operands, the subfields and qualifiers, and
the operations performed by the instructions. In the syntax descriptions, the left operand is
the source operand, and the right operand is the destination operand. The following list
contains the notations used in Table 3–14.
Notation for operands:
PC
Program counter
SR
Status register
V
Overflow condition code
Immediate Data
Immediate data from the instruction
Source
Source contents
Destination
Destination contents
Vector
Location of exception vector
+ inf
Positive infinity
–inf
Negative infinity
〈fmt〉
Operand data format: byte (B) word (W), long
(L), single (S), double (D), extended (X), or
packed (P)
FPm
One of eight floating-point data registers (always
specifies the source register)
FPn
One of eight floating-point data registers (always
specifies the destination register)
Notation for subfields and qualifiers:
〈bit〉 of (operand〉
Selects a single bit of the operand
〈ea〉 {offset:width}
Selects a bit field
(
〈operand〉)
The contents of the referenced location
〈operand〉
10
The operand is binary-coded decimal; operations are per-
formed in decimal
(
〈address register〉)
The register indirect operation
–(
〈address register〉)
Indicates that the operand register points to the memory
(
〈address register〉) + —
Location of the instruction operand — the optional mode
qualifiers are -, +, (d), and (d,ix)
#xxx or #
〈data〉
Immediate data that follows the instruction word(s)


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