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MC68030FE33 Datasheet(PDF) 89 Page - Motorola, Inc

Part No. MC68030FE33
Description  ENHANCED 32-BIT MICROPROCESSOR
Download  602 Pages
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MC68030FE33 Datasheet(HTML) 89 Page - Motorola, Inc

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Instruction Set Summary
MOTOROLA
MC68030 USER’S MANUAL
3-11
3.2.8 Program Control Instructions
A set of subroutine call and return instructions and conditional and unconditional branch
instructions perform program control operations. The no operation instruction (NOP) may be
used to force synchronization of the internal pipelines. Table 3–8 summarizes these
instructions.
Letters cc in the integer instruction mnemonics Bcc, DBcc, and Scc specify testing one of the following conditions:
CC
Carry clear
GE
Greater or equal
LS
Lower or same
PL
Plus
CS
Carry set
GT
Greater than
LT
Less than
T
Always true*
EQ
Equal
HI
Higher
MI
Minus
VC
Overflow clear
F
Never true*
LE
-Less or equal
NE
Not equal
VS
Overflow set
*Not applicable to the Bcc instructions.
Table 3-8. Program Control Operations
Instruction
Operand Syntax
Operand Size
Operation
Integer and Floating-Point Conditional
Bcc
〈label〉
8, 16, 32
if condition true, then PC + d
→ PC
DBcc
Dn,
〈label〉
16
if condition false, then Dn — 1
→ Dn
if Dn
≠ -1, then PC + d → PC
Scc
〈ea〉
8
if condition true, then 1's
→ destination;
else 0's
→ destination
Unconditional
BRA
〈label〉
8, 16, 32
PC + d
→ PC
BSR
〈label〉
8, 16, 32
SP — 4
→ SP; PC→(SP); PC + d → PC
JMP
〈ea〉
none
destination
→ PC
JSR
〈ea〉
none
SP — 4
→ SP; PC→ (SP); destination → PC
NOP
none
none
PC + 2
→ PC
Returns
RTD
#
〈d〉
16
(SP)
→ PC; SP + 4 + d → SP
RTR
none
none
(SP)
→ CCR; SP + 2 → SP; (SP) → PC; SP + 4 → SP
RTS
none
none
(SP)
→ PC; SP + 4→ SP


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