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MC68030FE33 Datasheet(PDF) 87 Page - Motorola, Inc

Part No. MC68030FE33
Description  ENHANCED 32-BIT MICROPROCESSOR
Download  602 Pages
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MC68030FE33 Datasheet(HTML) 87 Page - Motorola, Inc

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Instruction Set Summary
MOTOROLA
MC68030 USER’S MANUAL
3-9
3.2.6 Bit Field Operations
The MC68030 supports variable-length bit field operations on fields of up to 32 bits. The bit
field insert (BFINS) instruction inserts a value into a bit field. Bit field extract unsigned
(BFEXTU) and bit field extract signed (BFEXTS) extract a value from the field. Bit field find
first one (BFFFO) finds the first bit that is set in a bit field. Also included are instructions that
are analogous to the bit manipulation operations; bit field test (BFTST), bit field test and set
(BFSET), bit field test and clear (BFCLR), and bit field test and change (BFCHG). Table 3–
6 is a summary of the bit field operations.
NOTE: All bit field instructions set the N and Z bits as shown for BFTST before performing the specified operation.
Table 3-5. Bit Manipulation Operations
Instruction
Operand Syntax
Operand Size
Operation
BCHG
Dn,
〈ea〉
#
〈data〉,ea
8, 32
8, 32
∼ (〈bit number〉 of destination) → Z → bit of destination
BCLR
Dn,
〈ea〉
#
〈data〉,ea
8, 32
8, 32
∼ (〈bit number〉 of destination) → Z;
— 0
→ bit of destination
BSET
Dn,
〈ea〉
#
〈data〉,〈ea〉
8, 32
8, 32
∼ (〈bit number〉 of destination) → Z;
— 1
→ bit of destination
BTST
Dn,
〈ea〉
#
〈data〉,ea
8, 32
8, 32
∼ (〈bit number〉 of destination) → Z
Table 3-6. Bit Field Operations
Instruction
Operand Syntax
Operand Size
Operation
BFCHG
〈ea〉 {offset:width}
1 — 32
∼ Field → Field
BFCLR
〈ea〉 {offset:width}
1 — 32
0's
→ Field
BFEXTS
〈ea〉 {offset:width},Dn
1—32
Field
→ Dn; Sign Extended
BFEXTU
〈ea〉 {offset:width},Dn
1 — 32
Field
→ Dn; Zero Extended
BFFFO
〈ea〉 {offset:width},Dn
1 — 32
Scan for first bit set in field; offset
→ Dn
BFINS
Dn,
〈ea〉 {offset:width}
1 — 32
Dn
→ Field
BFSET
〈ea〉 {offset:width}
1 — 32
1's
→ Field
BFTST
〈ea〉 {offset:width}
1 — 32
Field MSB
→ N; ∼ (OR of all bits in field) → Z


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