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MC68030FE33 Datasheet(PDF) 85 Page - Motorola, Inc

Part No. MC68030FE33
Description  ENHANCED 32-BIT MICROPROCESSOR
Download  602 Pages
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MC68030FE33 Datasheet(HTML) 85 Page - Motorola, Inc

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Instruction Set Summary
MOTOROLA
MC68030 USER’S MANUAL
3-7
3.2.4 Shift and Rotate Instructions
The arithmetic shift instructions (ASR and ASL) and logical shift instructions (LSR and LSL)
provide shift operations in both directions. The ROR, ROL, ROXR, and ROXL instructions
perform rotate (circular shift) operations, with and without the extend bit. All shift and rotate
operations can be performed on either registers or memory.
Register shift and rotate operations shift all operand sizes. The shift count may be specified
in the instruction operation word (to shift from 1–8 places) or in a register (modulo 64 shift
count).
Memory shift and rotate operations shift word-length operands one bit position only. The
SWAP instruction exchanges the 16-bit halves of a register. Performance of shift/rotate
instructions is enhanced so that use of the ROR and ROL instructions with a shift count of
eight allows fast byte swapping. Table 3–4 is a summary of the shift and rotate operations.
Table 3-3. Logical Operations
Instruction
Operand Syntax
Operand Size
Operation
AND
〈ea〉,Dn
Dn,
〈ea〉
8, 16, 32
8, 16, 32
source
Λ destination → destination
ANDI
#
〈data〉,〈ea〉
8, 16, 32
immediate data
Λ destination → destination
EOR
Dn,
〈data〉,〈ea〉
8, 16, 32
source
⊕ destination → destination
EORI
#
〈data〉,〈ea〉
8, 16, 32
immediate data x destination
→ destination
NOT
〈ea〉
8, 16, 32
∼ destination → destination
OR
〈ea〉,Dn
Dn,
〈ea〉
8, 16, 32
8, 16, 32
source V destination
→ destination
ORI
#
〈data〉,〈ea〉
8, 16, 32
immediate data V destination
→ destination
TST
#
〈ea〉
8, 16, 32
source — 0 to set condition codes


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