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## MC68030FE33 Datasheet(PDF) 83 Page - Motorola, Inc

 Part No. MC68030FE33 Description ENHANCED 32-BIT MICROPROCESSOR Download 602 Pages Scroll/Zoom 100% Maker MOTOROLA [Motorola, Inc] Homepage http://www.freescale.com Logo

## MC68030FE33 Datasheet(HTML) 83 Page - Motorola, Inc

 83 / 602 page Instruction Set SummaryMOTOROLAMC68030 USER’S MANUAL3-5Table 3–1 is a summary of the integer and floating-point data movement operations.3.2.2 Integer Arithmetic InstructionsThe integer arithmetic operations include the four basic operations of add (ADD), subtract(SUB), multiply (MUL), and divide (DIV) as well as arithmetic compare (CMP, CMPM,CMP2), clear (CLR), and negate (NEG). The instruction set includes ADD, CMP, and SUBinstructions for both address and data operations with all operand sizes valid for dataoperations. Address operands consist of 16 or 32 bits. The clear and negate instructionsapply to all sizes of data operands.Signed and unsigned MUL and DIV instructions include:• Word multiply to produce a long-word product• Long-word multiply to produce and long-word or quad-word product• Division of a long word divided by a word divisor (word quotient and word remainder)• Division of a long word or quad word dividend by a long-word divisor (long-word quo-tient and long-word remainder)A set of extended instructions provides multiprecision and mixed-size arithmetic. Theseinstructions are add extended (ADDX), subtract extended (SUBX), sign extended (EXT),and negate binary with extend (NEGX). Refer to Table 3–2 for a summary of the integerarithmetic operations.Table 3-1. Data Movement OperationsInstructionOperand SyntaxOperand SizeOperationEXGRn,Rn32Rn↔ RnLEA〈ea〉,An32〈ea〉 → AnLINKAn,#〈d〉16, 32Sp - 4→ SP; An → (SP); SP → An, SP + D → SPMOVEMOVEA〈ea〉,〈ea〉,An8, 16, 3216, 32→ 32source→ destinationMOVEMlist,〈ea〉,list16, 3216, 32→ 32listed registers→ destinationsource→ listed registersMOVEPDn,(d16,An)(d16,An),Dn16, 32Dn[31:24]→ (An + d); Dn[23:16] → An + d + 2);Dn[15:8]→ (An + d + 4); Dn[7:0] → (An + d + 6)(An + d)→ Dn[31:24]; (An + d + 2) → Dn[23:16];(An + d + 4)→ Dn[15:8]; (An + d + 6) → Dn[7:0]MOVEQ#〈data〉,Dn8→ 32immediate data→ destinationPEA〈ea〉32SP — 4→ SP; 〈ea〉 → (SP)UNLKAn32An→ SP; (SP) → An; SP + 4 → SP

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