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STM8S Datasheet(PDF) 64 Page - STMicroelectronics |
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STM8S Datasheet(HTML) 64 Page - STMicroelectronics |
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64 / 467 page  Interrupt controller (ITC) RM0016 64/467 DocID14587 Rev 14 moments in order to execute a specific task. Some of these recurring tasks are short enough to be treated directly in an ISR (interrupt service routine), rather than going back to the main program. To cover this case, you can set the AL bit before entering Low power mode (by executing WFI instruction), then the interrupt routine returns directly to Low power mode. The run time/ISR execution is reduced due to the fact that the register context is saved only on the first interrupt. As a consequence, all the operations can be executed in ISR in very simple applications. In more complex ones, an interrupt routine may relaunch the main program by simply resetting the AL bit. For example, an application may need to be woken up by the auto-wakeup unit (AWU) every 50 ms in order to check the status of some pins/sensors/push-buttons. Most of the time, as these pins are not active, the MCU can return to Low power mode without running the main program. If one of these pins is active, the ISR decides to launch the main program by resetting the AL bit. 6.5 Concurrent and nested interrupt management STM8 devices feature two interrupt management modes: • Concurrent mode • Nested mode 6.5.1 Concurrent interrupt management mode In this mode, all interrupts are interrupt priority level 3 so that none of them can be interrupted, except by a TLI, RESET, or TRAP. The hardware priority is given in the following order from the lowest to the highest priority, that is: MAIN, IT4, IT3, IT2, IT1, IT0, TRAP/TLI (same priority), and RESET. Figure 15 shows an example of concurrent interrupt management mode. Figure 15. Concurrent interrupt management MSv47717V2 Software priority level I1 I0 31 1 31 1 31 1 31 1 31 1 31 1 3/0 10 11/10 RIM TRAP IT0 IT3 IT4 IT2 IT1 IT1 Main Main |
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