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STR84145 Datasheet(PDF) 3 Page - Allegro MicroSystems

Part No. STR84145
Description  LATCHED, UNIVERSAL INPUT-VOLTAGE SWITCHES
Download  8 Pages
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Maker  ALLEGRO [Allegro MicroSystems]
Homepage  http://www.allegromicro.com
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STR84145 Datasheet(HTML) 3 Page - Allegro MicroSystems

   
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SIMPLIFIED OPERATION
ELECTRICAL CHARACTERISTICS at T
A = +25°C, voltage measurements are referenced to Common (pin 3)
(unless otherwise noted).
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ. Max.
Units
On-State Voltage
V
TM
STR83145, I
T = 10 A*
1.8
V
STR84145, I
T = 12 A*
1.6
V
Off-State Current
I
DRM
STR83145, V
D = 500 V
100
µA
STR84145, V
D = 500 V
40
µA
Starting Voltage
V
S
V
T = 2 V
100
V
Startup Time Delay
t
D
C
2 = 1 µF, VMT1 ≥ 100 V dc
40
100
ms
DC Switch-Over Voltage
V
C
V
DELAY ≤ 1 V
200
205
210
V
Temperature Coefficient
of Switch-Over Voltage
α
VC
-20
°C ≤ T
M ≤ +100°C–
±45
mV/
°C
Input Current
I
MT1
Voltage-doubler mode, V
MT1 = 195 V
10
mA
Full-bridge mode, V
MT1 = 400 V
6.5
mA
Delay Terminal Voltage
V
DELAY
7.0
V
Triac Gate-Drive Osc. Freq.
f
o
V
gate ref. MT1, VMT1 = 100 V
15
kHz
Latch Reset Voltage
V
R
V
GATE = 400 mV
2.0
15
V
Thermal Resistance
RθJM
FET channel to mounting surface
1.8
°C/W
NOTES: Negative current is defined as coming out of (sourcing) the specified device terminal.
Typical Data is for design information only.
*In practical use, IT is recommended derated to 70%.
+
+
240–373 V peak
+
+
246–373 V peak
Full-Bridge Mode
Dwg. EK-006
Voltage-Doubler Mode
STR83145 AND STR84145
LATCHED, UNIVERSAL
INPUT-VOLTAGE SWITCHES


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