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MC74HC540A Datasheet(PDF) 3 Page - ON Semiconductor

Part No. MC74HC540A
Description  Octal 3-State Inverting Buffer/Line Driver/Line Receiver
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC74HC540A Datasheet(HTML) 3 Page - ON Semiconductor

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MC74HC540A
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3
DC CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
VCC
V
Symbol
Unit
≤125°C
≤85°C
–55 to 25
°C
VCC
V
Condition
Parameter
IOZ
Maximum Three–State Leakage
Current
Output in High Impedance State
Vin = VIL or VIH
Vout = VCC or GND
6.0
±0.5
±5.0
±10.0
µA
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0µA
6.0
4
40
160
µA
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book
(DL129/D).
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
VCC
Guaranteed Limit
Symbol
Parameter
VCC
V
–55 to 25
°C
≤85°C
≤125°C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 3)
2.0
3.0
4.5
6.0
80
30
18
15
100
40
23
20
120
55
28
25
ns
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
2.0
3.0
4.5
6.0
110
45
25
21
140
60
31
26
165
75
38
31
ns
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
2.0
3.0
4.5
6.0
110
45
25
21
140
60
31
26
165
75
38
31
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
3.0
4.5
6.0
60
22
12
10
75
28
15
13
90
34
18
15
ns
Cin
Maximum Input Capacitance
10
10
10
pF
Cout
Maximum Three–State Output Capacitance (Output in High
Impedance State)
15
15
15
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°C, VCC = 5.0 V, VEE = 0 V
CPD
Power Dissipation Capacitance (Per Buffer)*
35
pF
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
ON Semiconductor High–Speed CMOS Data Book (DL129/D).
Figure 1.
VCC
GND
INPUT A
OUTPUT Y
tPHL
OE1 or OE2
50%
VCC
GND
OUTPUT Y
tPZL
OUTPUT Y
tPZH
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
10%
90%
tPLZ
tPHZ
50%
50%
tPLH
90%
50%
10%
tr
tTHL
tf
tTLH
Figure 2.
SWITCHING WAVEFORMS
90%
50%
10%
50%


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