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M5M5W816WG-85L Datasheet(PDF) 4 Page - Mitsubishi Electric Semiconductor

Part No. M5M5W816WG-85L
Description  8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM
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Maker  MITSUBISHI [Mitsubishi Electric Semiconductor]
Homepage  http://www.mitsubishichips.com
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M5M5W816WG-85L Datasheet(HTML) 4 Page - Mitsubishi Electric Semiconductor

   
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MITSUBISHI ELECTRIC
M5M5W816WG -85L, 10L, 85H, 10H
-85LI, 10LI, 85HI, 10HI
1999.1.15
Ver. 0.1
8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM
MITSUBISHI LSIs
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
AC ELECTRICAL CHARACTERISTICS (Vcc=1.8 ~ 2.7V, unless otherwise noted)
Input rise time and fall time
Reference level
Output loads
1.8~2.7V
VIH=0.7 x Vcc, VIL=0.2V
Transition is measured ±200mV from
steady state voltage.(for ten,tdis)
5ns
Fig.1,CL=30pF
CL=5pF (for ten,tdis)
(1) TEST CONDITIONS
Supply voltage
Input pulse
1TTL
CL
DQ
Fig.1 Output load
Including scope and
jig capacitance
tCR
ns
ta(S1)
ta(OE)
tdis(S1)
tdis(OE)
ten(S1)
ten(OE)
tV(A)
ta(A)
10
45
ns
ns
ns
ns
ns
ns
ns
ns
ta(BC1)
ta(BC2)
tdis(BC1)
tdis(BC2)
tdis(BC1)
tdis(BC2)
ns
ns
ns
ns
ns
ns
85
85
85
85
30
30
30
30
10
10
5
10
100
10
50
100
100
100
100
35
35
35
35
10
10
5
10
ta(S2)
ns
85
100
ten(S2)
10
ns
10
tdis(S2)
ns
30
35
85
85L, 85H,
85LI, 85HI
4
tsu(A-WH)
tCW
tw(W)
tsu(A)
tsu(S1)
tsu(D)
th(D)
trec(W)
tdis(W)
tdis(OE)
ten(W)
ten(OE)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tsu(BC1)
tsu(BC2)
35
35
tsu(S2)
ns
30
30
100
75
0
85
5
5
85
85
85
50
0
0
85
85
60
0
70
5
5
70
70
70
45
0
0
70
Symbol
Parameter
Read cycle time
Limits
Address access time
Chip select 1 access time
Chip select 2 access time
Byte control 1 access time
Byte control 2 access time
Output enable access time
Output disable time after S2 low
Output disable time after S1 high
Output disable time after BC1 high
Max
Min
Max
Min
Units
(2) READ CYCLE
Output disable time after BC2 high
Output disable time after OE high
Output enable time after S1 low
Output enable time after S2 high
Output enable time after BC1 low
Output enable time after BC2 low
Output enable time after OE low
Data valid time after address
(3) WRITE CYCLE
Max
Min
Max
Min
Limits
Units
Write cycle time
Write pulse width
Address setup time
Address setup time with respect to W
Byte control 1 setup time
Byte control 2 setup time
Chip select 1 setup time
Chip select 2 setup time
Data setup time
Data hold time
Write recovery time
Output disable time from W low
Output disable time from OE high
Output enable time from W high
Output enable time from OE low
Symbol
Parameter
VOH=VOL=0.9V
10L, 10H,
10LI, 10HI
85L, 85H,
85LI, 85HI
10L, 10H,
10LI, 10HI


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