Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

SI5013 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

Part No. SI5013
Description  OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER
Download  24 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  ETC1 [List of Unclassifed Manufacturers]
Homepage  
Logo ETC1 - List of Unclassifed Manufacturers

SI5013 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

  SI5013 Datasheet HTML 1Page - List of Unclassifed Manufacturers SI5013 Datasheet HTML 2Page - List of Unclassifed Manufacturers SI5013 Datasheet HTML 3Page - List of Unclassifed Manufacturers SI5013 Datasheet HTML 4Page - List of Unclassifed Manufacturers SI5013 Datasheet HTML 5Page - List of Unclassifed Manufacturers SI5013 Datasheet HTML 6Page - List of Unclassifed Manufacturers SI5013 Datasheet HTML 7Page - List of Unclassifed Manufacturers SI5013 Datasheet HTML 8Page - List of Unclassifed Manufacturers SI5013 Datasheet HTML 9Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 24 page
background image
Rev. 1.4 5/05
Copyright © 2005 by Silicon Laboratories
Si5013
Si5013
OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER
Features
High-speed clock and data recovery device with integrated limiting amplifier:
Applications
Description
The Si5013 is a fully-integrated, high-performance limiting amplifier (LA) and clock
and data recovery (CDR) IC for high-speed serial communication systems. It
derives timing information and data from a serial input at OC-12/3 and STM-4/1
rates. Use of an external reference clock is optional. Silicon Laboratories®
DSPLLtechnology eliminates sensitive noise entry points, thus making the PLL
less susceptible to board-level interaction and helping to ensure optimal jitter
performance.
The Si5013 represents a new standard in low jitter, low power, small size, and
integration for high-speed LA/CDRs. It operates from a 3.3 V supply over the
industrial temperature range (–40 to 85 °C).
Functional Block Diagram
„ Supports OC-12/3, STM-4/1
„ DSPLL™ technology
„ Jitter generation 2.3 mUIrms (typ)
„ Small footprint: 5 x 5 mm
„ Reference and reference-less
operation supported
„ Loss-of-signal level alarm
„ Data slicing level control
„ 10 mVPP differential sensitivity
„ 3.3 V supply
„ SONET/SDH/ATM routers
„ Add/drop multiplexers
„ Digital cross connects
„ Board level serial links
„ SONET/SDH test equipment
„ Optical transceiver modules
„ SONET/SDH regenerators
Limiting
Amp
DSPLL
Lock
Detection
Retimer
Reset/
Calibration
Bias Gen.
BUF
BUF
CLKOUT+
CLKOUT–
DIN+
DIN–
REFCLK+
REFCLK–
(Optional)
LOS
LOL
REXT
RESET/CAL
SLICE_LVL
DSQLCH
CLK_DSBL
LTR
RATESEL
Signal
Detect
LOS_LVL
BER_LVL
BER
Monitor
DOUT+
DOUT–
2
2
2
2
BER_ALM
Ordering Information:
See page 21.
Pin Assignments
Si5013
GND
Pad
1
2
3
4
5
GND
LOS_LVL
REFCLK+
RATESEL
SLICE_LVL
6
7
LOL
REFCLK–
21
20
19
18
17
REXT
RESET/CAL
DOUT+
VDD
VDD
16
15
TDI
DOUT–
8
9
10 11 12 13 14
28 27 26 25 24 23 22


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn