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IDT72V70200 Datasheet(PDF) 21 Page - Integrated Device Technology |
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IDT72V70200 Datasheet(HTML) 21 Page - Integrated Device Technology |
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21 / 24 page  21 COMMERCIALTEMPERATURERANGE IDT72V70200 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 512 x 512 DS 5711 drw15 ADDRESS tCSS tDSH tASW tCSH tDDR tADS tADH AD0-AD7 D8-D15 WR CS DTA DATA ADDRESS DATA tRWS tDWS tSWD tDHW tAKD AD0-AD7 D8-D15 RD R/ W AS tRWH tDHR tAKH AC ELECTRICAL CHARACTERISTICS - MULTIPLEXED BUS TIMING (MOTOROLA) Figure 12. Multiplexed Bus Timing (Motorola Mode) Symbol Parameter Min. Typ. Max. Units Test Conditions tASW ALE Pulse Width 20 ns tADS Address Setup from AS falling 3 ns tADH Address Hold from AS falling 3 ns tDDR Data Setup from DTA LOW on Read 5 ns CL = 150pF tCSH CS Hold after DS falling 0 ns tCSS CS Setup from DS rising 0 ns tDHW Data Hold after Write 5 ns tDWS Data Setup from DS – Write (Fast Write) 20 ns tSWD Valid Data Delay on Write (Slow Write) 122 ns tRWS R/ W Setup from DS Rising 60 ns tRWH R/ W Hold from DS Rising 5 ns tDHR(1) Data Hold after Read 10 20 ns CL = 150pF, RL = 1K tDSH DS Delay after AS falling 10 ns tAKD Acknowledgment Delay: Reading/WritingRegisters 43/43 ns CL = 150pF Reading/Writing Memory 760/750 ns CL = 150pF tAKH(1) Acknowledgment Hold Time 22 ns CL = 150pF, RL = 1K NOTE: 1. High Impedance is measured by pulling to the appropriate rail with R L, with timing corrected to cancel time taken to discharge CL. |
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