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MC74AC174 Datasheet(PDF) 2 Page - ON Semiconductor

Part No. MC74AC174
Description  Hex D Flip−Flop with Master Reset
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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MC74AC174 Datasheet(HTML) 2 Page - ON Semiconductor

   
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MC74AC174, MC74ACT174
http://onsemi.com
2
Figure 2. Logic Symbol
CP
MR
Q2 Q3 Q4 Q5
D0 D1 D2 D3 D4 D5
Q1
Q0
FUNCTIONAL DESCRIPTION
The
MC74AC174/74ACT174
consists
of
six
edge−triggered D flip−flops with individual D inputs and Q
outputs. The Clock (CP) and Master Reset (MR) are
common to all flip−flops. Each D input’s state is transferred
to the corresponding flip−flop’s output following the
LOW−to−HIGHClock (CP) transition. A LOW input to the
Master Reset (MR) will force all outputs LOW independent
of Clock or Data inputs. The MC74AC174/ 74ACT174 is
useful for applications where the true output only is required
and the Clock and Master Reset are common to all storage
elements.
Figure 3. Logic Diagram
CP
MR
Q5
D5
Q
CD
NOTE: This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation
delays.
CP
D
Q4
D4
Q
CD
CP
D
Q3
D3
Q
CD
CP
D
Q2
D2
Q
CD
CP
D
Q1
D1
Q
CD
CP
D
Q0
D0
Q
CD
CP
D
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
−0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
−0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
−0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±20
mA
IOUT
DC Output Sink/Source Current, per Pin
±50
mA
ICC
DC VCC or GND Current per Output Pin
±50
mA
Tstg
Storage Temperature
−65 to +150
°C
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-
mended Operating Conditions.


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