Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ISL3873A Datasheet(PDF) 21 Page - Intersil Corporation

Part No. ISL3873A
Description  Wireless LAN Integrated Medium Access Controller with Baseband Processor
Download  42 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo 

ISL3873A Datasheet(HTML) 21 Page - Intersil Corporation

Zoom Inzoom in Zoom Outzoom out
 21 / 42 page
background image
21
CR 3 - Defines the short preamble length minus the SFD in
symbols. The 802.11 protocol requires a setting of 56d = 38h
for the optional short preamble.
CR 4 - Defines the long preamble length minus the SFD in
symbols. The 802.11 protocol requires a setting of
128d = 80h for the mandatory long preamble.
CR 5 Bits 0, 1 - These bits of the register set the Signal field
to indicate what modulation is to be used for the data portion
of the packet.
CR 6 - The value to be used in the Service field.
CR 7 and 8 - Defines the value of the transmit data length
field. This value includes all symbols following the last
header field symbol and is in microseconds required to
transmit the data at the chosen data rate.
The packet consists of the preamble, header and MAC Protocol
Data Unit (MPDU). The data is transmitted exactly as received
from the control processor. Some dummy bits will be appended
to the end of the packet to ensure an orderly shutdown of the
transmitter. This prevents spectrum splatter. At the end of a
packet, the external controller is expected to de-assert the
TX_PE line to shut the transmitter down.
Scrambler and Data Encoder Description
The modulator has a data scrambler that implements the
scrambling algorithm specified in the IEEE 802.11 standard.
This scrambler is used for the preamble, header, and data in
all modes. The data scrambler is a self synchronizing circuit.
It consists of a 7-bit shift register with feedback from
specified taps of the register. Both transmitter and receiver
use the same scrambling algorithm. The scrambler can be
disabled by settingCR32bit 2 to1.
NOTE: Be advised that the IEEE 802.11 compliant scrambler in the
ISL3873A has the property that it can lock up (stop scrambling) on
random data followed by repetitive bit patterns. The probability of this
happening is 1/128. The patterns that have been identified are all
zeros, all ones, repeated 10s, repeated 1100s, and repeated 111000s.
Any break in the repetitive pattern will restart the scrambler. To ensure
that this does not cause any problem, the CCK waveform uses a ping
pong differential coding scheme that breaks up repetitive 0’s patterns.
Scrambling is done by division with a prescribed polynomial
as shown in Figure 15. A shift register holds the last quotient
and the output is the exclusive or of the data and the sum of
taps in the shift register. The transmit scrambler seed for the
long preamble or for the short preamble can be set with
CR48 or CR49.
For the 1Mbps DBPSK data rates and for the header in all rates
using the long preamble, the data coder implements the
desired DBPSK coding by differential encoding the serial data
from the scrambler and driving both the I and Q output
channels together. For the 2Mbps DQPSK data rate and for the
header in the short preamble mode, the data coder implements
the desired coding as shown in the DQPSK Data Encoder
Table 7. This coding scheme results from differential coding of
dibits (2 bits). Vector rotation is counterclockwise although bits 6
and 7 of configuration register CR 1 can be used to reverse the
rotation sense of the TX or RX signal if desired.
Spread Spectrum Modulator Description
The modulator is designed to generate DBPSK, DQPSK, and
CCK spread spectrum signals. The modulator is capable of
automatically switching its rate where the preamble is
DBPSK modulated, and the data and/or header are
modulated differently. The modulator can support date rates
of 1, 2, 5.5 and 11Mbps. Quadraphase (I/Q) modulation is
used at the baseband for all modulation modes. Further
information on the programming details required to set up
the modulator can be obtained by contacting the factory.
In the 1Mbps DBPSK mode, the I and Q Channels are
connected together and driven with the output of the scrambler
and differential encoder. The I and Q Channels are then both
multiplied with the 11-bit Barker word at the spread rate. The I
and Q signals go to the Quadrature upconverter (HFA3724) to
be modulated onto a carrier. Thus, the spreading and data
modulation are BPSK modulated onto the carrier.
For the 2Mbps DQPSK mode, the serial data is formed into
dibits or bit pairs in the differential encoder as detailed
above. One of the bits from the differential encoder goes to
the I Channel and the other to the Q Channel. The I and Q
Channels are then both multiplied with the 11-bit Barker
word at the spread rate. This forms QPSK modulation at the
symbol rate with BPSK modulation at the spread rate.
CCK Modulation
For the CCK modes, the spreading code length is 8 complex
chips and based on complementary codes. The chipping rate is
11Mchip/s. The following formula is used to derive the CCK
code words that are used for spreading both 5.5 and 11Mbps:
(LSB to MSB), where c is the code word.
FIGURE 15. SCRAMBLING PROCESS
Z-1 Z-2 Z-3 Z-4
Z-5 Z-6 Z-7
XOR
SERIAL DATA
IN
XOR
SERIAL
DATA OUT
TABLE 7. DQPSK DATA ENCODER
PHASE SHIFT
DIBIT PATTERN (d0, d1)
d0 IS FIRST IN TIME
000
+90
01
+180
11
-90
10
ce
j
ϕ
1
ϕ
2
ϕ
3
ϕ
4
++
+
()
e
j
ϕ
1
ϕ
3
ϕ
4
++
()
e
j
ϕ
1
ϕ
2
ϕ
4
++
()
,
e
j
ϕ
1
ϕ
4
+
()
e
j
ϕ
1
ϕ
2
ϕ
3
++
()
e
j
ϕ
1
ϕ
3
+
()
e
j
ϕ
1
ϕ
2
+
()
e
j
ϕ
1
,
,,
,
,,
=
ISL3873A


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn