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MC9S08QG8CPAE Datasheet(PDF) 83 Page - Freescale Semiconductor, Inc |
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MC9S08QG8CPAE Datasheet(HTML) 83 Page - Freescale Semiconductor, Inc |
83 / 300 page Chapter 6 Parallel Input/Output Control MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01 Freescale Semiconductor 83 6.4.4.3 Port B Drive Strength Select (PTBDS) An output pin can be selected to have high output drive strength by setting the corresponding bit in the drive strength select register (PTBDSn). When high drive is selected a pin is capable of sourcing and sinking greater current. Even though every I/O pin can be selected as high drive, the user must ensure that the total current source and sink limits for the chip are not exceeded. Drive strength selection is intended to affect the DC behavior of I/O pins. However, the AC behavior is also affected. High drive allows a pin to drive a greater load with the same switching speed as a low drive enabled pin into a smaller load. Because of this the EMC emissions may be affected by enabling pins as high drive. 76543210 R PTBDS7 PTBDS6 PTBDS5 PTBDS4 PTBDS3 PTBDS2 PTBDS1 PTBDS0 W Reset: 00000000 Figure 6-16. Drive Strength Selection for Port B Register (PTBDS) Table 6-10. PTBDS Register Field Descriptions Field Description 7:0 PTBDS[7:0] Output Drive Strength Selection for Port B Bits — Each of these control bits selects between low and high output drive for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect. 0 Low output drive strength selected for port B bit n. 1 High output drive strength selected for port B bit n. |
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