ICS87931BYIT datasheet(9/14 Pages) ICST

Part #	ICS87931BYIT

Description	LOW SKEW, 1-TO-6 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

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Manufacturer	ICST [Integrated Circuit Systems]

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9 / 14 page

87931BYI

www.icst.com/products/hiperclocks.html

REV. A JUNE 23, 2003

9

Integrated

Circuit

Systems, Inc.

ICS87931I

LOW SKEW, 1-TO-6

LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

DIFFERENTIAL CLOCK INPUT INTERFACE

The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL

and other differential signals. Both V

SWING and VOH must meet the

V

PP and VCMR input requirements. Figures 3A to 3D show inter-

face examples for the HiPerClockS CLK/nCLK input driven by

the most common driver types. The input interfaces suggested

FIGURE 3A. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY

ICS HIPERCLOCKS LVHSTL DRIVER

here are examples only. Please consult with the vendor of the

driver component to confirm the driver termination requirements.

For example in

Figure 3A, the input termination applies for ICS

HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver

from another vendor, use their termination recommendation.

1.8V

R2

50

Input

LVHSTL Driver

ICS

HiPerClockS

R1

50

LVHSTL

3.3V

Zo = 50 Ohm

HiPerClockS

CLK

nCLK

FIGURE 3C. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY

3.3V LVPECL DRIVER

FIGURE 3B. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY

3.3V LVPECL DRIVER

3.3V

R1

50

R3

50

Zo = 50 Ohm

LVPECL

Zo = 50 Ohm

HiPerClockS

CLK

nCLK

3.3V

Input

R2

50

Zo = 50 Ohm

Input

HiPerClockS

CLK

nCLK

3.3V

R3

125

R2

84

Zo = 50 Ohm

3.3V

R4

125

LVPECL

R1

84

3.3V

FIGURE 3D. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY

3.3V LVDS DRIVER

Zo = 50 Ohm

R1

100

3.3V

LVDS_Driv er

Zo = 50 Ohm

Receiv er

CLK

nCLK

3.3V

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