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CLRC63201T Datasheet(PDF) 10 Page - NXP Semiconductors

Part # CLRC63201T
Description  Standard multi-protocol reader solution
Download  127 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC63201T Datasheet(HTML) 10 Page - NXP Semiconductors

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CLRC632
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 27 February 2014
073937
10 of 127
NXP Semiconductors
CLRC632
Standard multi-protocol reader solution
Figure 6 shows the microprocessor connection to the CLRC632 using SPI.
Remark: The SPI implementation for CLRC632 conforms to the SPI standard and
ensures that the CLRC632 can only be addressed as a slave.
9.1.4.1
SPI read data
The structure shown in Table 7 must be used to read data using SPI. It is possible to read
up to n-data bytes. The first byte sent defines both, the mode and the address.
The address byte must meet the following criteria:
the Most Significant Bit (MSB) of the first byte sets the mode. To read data from the
CLRC632 the MSB is set to logic 1
bits [6:1] define the address
the Least Significant Bit (LSB) should be set to logic 0.
As shown in Table 8, all the bits of the last byte sent are set to logic 0.
Table 6.
SPI compatibility
CLRC632 pins
SPI pins
ALE
NSS
A2
SCK
A1
LOW
A0
MOSI
NRD
HIGH
NWR
HIGH
NCS
LOW
D7 to D1
do not connect
D0
MISO
Fig 6.
Connection to microprocessor: SPI
001aak610
LOW
NCS
D0
ALE
A2
SCK
A1
LOW
MOSI
NSS
A0
MISO
DEVICE
Table 7.
SPI read data
Pin
Byte 0
Byte 1
Byte 2
...
Byte n
Byte n + 1
MOSI
address 0
address 1 address 2 ...
address n
00
MISO
XX
data 0
data 1
...
data n
 1data n


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