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X80201 Datasheet(PDF) 1 Page - Intersil Corporation |
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X80201 Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 16 page 1 ® FN8154.0 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X80200, X80201, X80202, X80203, X80204 Power Supply Sequencer with Power-up System Monitoring The X80200 power sequencer provides a flexible approach for handling difficult system power-up conditions. The X80200 includes control of up to three voltage supplies and can be cascaded to control additional supplies. The device contains independent undervoltage lockout for each controlled voltage. The three voltage control circuits allow sequencing for primary, core, and I/O voltages. The core and I/O supplies are linked together with a comparator or a timer allowing a tight coupling between these two supplies. The sequencing may be either voltage based or time based. The X80200 contains separate charge pumps to control external N-channel power FETs for each of the supplies. The charge pumps provide the high gate control voltage necessary for efficient operation of the FET switches. The X80200 turns on the primary voltage to the system when the voltage source is steady. This primary FET switch turn-on can be delayed with an external RC circuit. For the secondary voltage sources, the device has a built-in “core- up-first and core-down-last” sequencing logic which is ideal for high performance processors, DSPs and ASICs. The serial bus can be used to monitor the status or turn off each of the external power switches. The X80200 has 3 slave address bits that allow up to 8 devices to be connected to the same bus. Pinout 20 LD TSSOP TOP VIEW Features • Sequence three voltage supplies independently - Core and Logic I/O VCC power sequencer for processor supplies - Power up and power down control - Voltage monitors have undervoltage lockout - Internal charge pump drives external N-channel FET switches - Cascadable to sequence more than 3 supplies - Time based or voltage based sequencing • Status register bits monitor gate output status • SMBus compatible Interface • Slave address identification for up to 8 power sequencers (24 supplies) on the same bus • Surface mount 20-pin TSSOP Package Applications • Distributed Power Supply Designs • Multi-voltage systems • Multiprocessor systems • Embedded Processor Applications • Digital Signal Processors, FPGAs, ASICs, Memory Controllers • N + 1 Redundant Power Supplies • Support for SSI – Server System Infrastructure Specifications • -48V Hotswap Power Backplane/Distribution • Card Insertion Detection and Power • Power Sequencing DC-DC Supplies • Databus Power Interfacing • Custom Industrial Power Backplanes • Other: ATE, Data Acquisition, Mass Storage, Servers, Data com, Wireless Basestations VFB GND DNC 1 2 3 4 5 6 7 16 15 14 13 12 11 SETV VDDL REF A0 A2 A1 VDDM VDDH GATE_H GATEH_EN READY GATE_M SCL SDA GATE_L ENS NC 8 9 10 20 19 18 17 Ordering Information PART NUMBER UVLOH UVLOM UVLOL PACKAGE X80200V20I 4.5 3.0 0.9 TSSOP X80201V20I 4.5 2.25 0.9 TSSOP X80202V20I 3.0 2.25 1.7 TSSOP X80203V20I 3.0 2.25 0.9 TSSOP X80204V20I 3.0 0.9 0.9 TSSOP Data Sheet January 21, 2005 |
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